u-boot.git/cpu/ppc4xx/start.S, branch v2009.08-rc2

Dual-license IBM code contributions

2009-08-09T21:15:33Z

It was brought to our attention that U-Boot contains code derived from the IBM OpenBIOS source code originally provided with some of the older PowerPC 4xx development boards. As a result, the original license of this code has been carried in the various files for a number of years in the U-Boot project. IBM is dual-licensing the IBM code contributions already present in U-Boot under either the terms of the GNU General Public License version 2, or the original code license already present. Signed-off-by: Josh Boyer

ppc4xx: Replace 4xx lowercase SPR references

2009-07-24T04:47:17Z

Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese

ppc4xx: Fix TLB reset problem with recent 44x images

2009-07-24T04:42:31Z

Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal" booting on some 44x platforms. This breakage is only noticed in some cases while powercycling. As it seems, the code in question in start.S didn't invalidate TLB #0. This makes sense since this TLB is used for the bootrom mapping. With the patch mentioned above even TLB #0 got invalidated resulting in an error later on. This patch now fixes this issue by only invalidating TLB #0 in the RAM- booting case. Tested succesfully on Sequoia and Canyonlands. Signed-off-by: Stefan Roese Cc: Dirk Eibach

ppc4xx: Make pll_write global

2009-07-08T08:59:07Z

This patch makes pll_write on PPC405EP boards global and callable from C code. pll_write can be used to dynamically modify the PLB:PCI divider as it is required for 33/66 MHz pci adapters based on the 405EP. board_early_init_f() is a good place to do that (check M66EN signal and call pll_write() when it is required). Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese

ppc4xx: Add Sequoia RAM-booting target

2009-06-12T18:39:47Z

This patch adds another build target for the AMCC Sequoia PPC440EPx eval board. This RAM-booting version is targeted for boards without NOR FLASH (NAND booting) which need a possibility to initially program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000) configured to setup the SDRAM, this debugger can load this RAM- booting image to the target address in SDRAM (in this case 0x1000000) and start it there. Then U-Boot's standard NAND commands can be used to program the NAND FLASH (e.g. "nand write ..."). Here the commands to load and start this image from the BDI2000: 440EPX>reset halt 440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin 440EPX>go 0x1000000 Please note that this image automatically scans for an already initialized SDRAM TLB (detected by EPN=0). This TLB will not be cleared. This TLB doesn't need to be TLB #0, this RAM-booting version will detect it and preserve it. So booting via BDI2000 will work and booting with a complete different TLB init via U-Boot works as well. Signed-off-by: Stefan Roese

Coding style cleanup, update CHANGELOG.

2008-12-16T00:02:17Z

Signed-off-by: Wolfgang Denk

Update U-Boot's build timestamp on every compile

2008-12-06T22:36:43Z

Use the GNU 'date' command to auto-generate a new U-Boot timestamp on every compile. Signed-off-by: Peter Tyser

ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization

2008-11-21T10:02:04Z

Expanded OCM TLB to allow access to 64K OCM as well as 256K of internal SRAM. Adjusted internal SRAM initialization to match updated user manual recommendation. OCM & ISRAM are now mapped as follows: physical virtual size ISRAM 0x4_0000_0000 0xE300_0000 256k OCM 0x4_0004_0000 0xE304_0000 64k A single TLB was used for this mapping. Signed-off-by: Dave Mitchell Signed-off-by: Stefan Roese

ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs

2008-11-21T09:52:33Z

Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and L2 cache DCRs from ppc440.h to this new header. Also converted these DCR defines from lowercase to uppercase and modified referencing modules to use them. Signed-off-by: Dave Mitchell Signed-off-by: Stefan Roese

ppc4xx: Clear all potentially pending exceptions in MCSR

2008-11-20T10:48:53Z

This is needed on Canyonlands which still has an exception pending while running relocate_code(). This leads to a failure after trap_init() is moved to the top of board_init_r(). Signed-off-by: Stefan Roese