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<title>u-boot.git/cpu/ppc4xx, branch v1.3.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>PPC4xx (Sequoia): Fix Ethernet "remote fault" problems</title>
<updated>2008-03-04T07:55:27+00:00</updated>
<author>
<name>Mike Nuss</name>
<email>mike@terascala.com</email>
</author>
<published>2008-03-03T20:27:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=74eb0222594fd23aafdf168e60e872814eea8b62'/>
<id>74eb0222594fd23aafdf168e60e872814eea8b62</id>
<content type='text'>
Every now and then a Sequoia board (or equivalent hardware) had
problems connecting to a Gigabit capable network interface.

There were differences in the PHY setup between Linux and U-Boot.

This patch fixes the problem. Apparently "remote fault" is being set,
which signals to some devices (on the other end of the cable) that a
fault has occurred, while other devices ignore it. I believe the RF bit
was causing the issue, but I removed T4 also, to match up with Linux.

Signed-off-by: Mike Nuss &lt;mike@terascala.com&gt;
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<pre>
Every now and then a Sequoia board (or equivalent hardware) had
problems connecting to a Gigabit capable network interface.

There were differences in the PHY setup between Linux and U-Boot.

This patch fixes the problem. Apparently "remote fault" is being set,
which signals to some devices (on the other end of the cable) that a
fault has occurred, while other devices ignore it. I believe the RF bit
was causing the issue, but I removed T4 also, to match up with Linux.

Signed-off-by: Mike Nuss &lt;mike@terascala.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>ppc4xx: EMAC: Fix 405EZ fifo size setup in EMAC_MR1</title>
<updated>2008-03-02T21:49:27+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2008-03-01T11:11:40+00:00</published>
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The 405EZ only supports 512 bytes of rx-/tx-fifo EMAC sizes. But
currently 4k/2k is configured. This patch fixes this issue.

Thanks to Thomas Kindler &lt;tkindler@lenord.de&gt; for pointing this out.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
The 405EZ only supports 512 bytes of rx-/tx-fifo EMAC sizes. But
currently 4k/2k is configured. This patch fixes this issue.

Thanks to Thomas Kindler &lt;tkindler@lenord.de&gt; for pointing this out.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>ppc4xx: Fix problem in 4xx_enet.c driver</title>
<updated>2008-03-02T20:34:55+00:00</updated>
<author>
<name>Anatolij Gustschin</name>
<email>agust@denx.de</email>
</author>
<published>2008-02-25T19:54:04+00:00</published>
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<content type='text'>
U-Boot crashes in the net loop if CONFIG_4xx_DCACHE is
enabled. To reproduce the problem ensure that 'ethrotate'
environment variable isn't set to "no" and then run
"tftp 200000 not_existent_file".
This patch tries to fix the issue.

Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
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<pre>
U-Boot crashes in the net loop if CONFIG_4xx_DCACHE is
enabled. To reproduce the problem ensure that 'ethrotate'
environment variable isn't set to "no" and then run
"tftp 200000 not_existent_file".
This patch tries to fix the issue.

Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu/ppc4xx/config.mk: Make a needlessly deffered expansion immediate.</title>
<updated>2008-02-23T08:44:54+00:00</updated>
<author>
<name>Shinya Kuribayashi</name>
<email>skuribay@ruby.dti.ne.jp</email>
</author>
<published>2008-02-23T08:05:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=495a0dde7fa1b14cdc15607d86503ec2bdcd02c4'/>
<id>495a0dde7fa1b14cdc15607d86503ec2bdcd02c4</id>
<content type='text'>
This will reduce the build time.

Signed-off-by: Shinya Kuribayashi &lt;skuribay@ruby.dti.ne.jp&gt;
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<pre>
This will reduce the build time.

Signed-off-by: Shinya Kuribayashi &lt;skuribay@ruby.dti.ne.jp&gt;
</pre>
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</entry>
<entry>
<title>Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx</title>
<updated>2008-02-14T23:22:37+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2008-02-14T23:22:37+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>PPC: Use r2 instead of r29 as global data pointer</title>
<updated>2008-02-14T21:43:22+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2008-02-14T21:43:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e7670f6c1e52ae6d2a43ff75a8bcfa7a5c86e47b'/>
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<content type='text'>
R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc
will refuse to use load/store multiple insns; instead, it issues a
list of simple load/store instructions upon function entry and exit,
resulting in bigger code size, which in turn makes the build for a
few boards fail.

Use r2 instead.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
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<pre>
R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc
will refuse to use load/store multiple insns; instead, it issues a
list of simple load/store instructions upon function entry and exit,
resulting in bigger code size, which in turn makes the build for a
few boards fail.

Use r2 instead.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc: Refactor cache routines, so there is only one common set.</title>
<updated>2008-02-14T21:00:41+00:00</updated>
<author>
<name>Rafal Jaworowski</name>
<email>raj@semihalf.com</email>
</author>
<published>2008-01-15T11:52:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f57d7d364ce189e39b0a64338d2f8012c074a2bd'/>
<id>f57d7d364ce189e39b0a64338d2f8012c074a2bd</id>
<content type='text'>
Signed-off-by: Rafal Jaworowski &lt;raj@semihalf.com&gt;
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<pre>
Signed-off-by: Rafal Jaworowski &lt;raj@semihalf.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>ppc4xx: Add CONFIG_4xx_DCACHE compile switch to Denali-core SPD code</title>
<updated>2008-02-14T06:42:32+00:00</updated>
<author>
<name>Larry Johnson</name>
<email>lrj@acm.org</email>
</author>
<published>2008-01-22T13:51:59+00:00</published>
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<id>29e3500cbc43c89eff6e720ca83e375deeecd9b3</id>
<content type='text'>
Signed-off-by: Larry Johnson &lt;lrj@acm.org&gt;
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<pre>
Signed-off-by: Larry Johnson &lt;lrj@acm.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>ppc4xx: Fix ndfc HW ECC byte order</title>
<updated>2008-02-04T10:47:40+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2008-02-01T08:38:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ff02f139804f3cb61414f7bbcbfdaa0279e3efae'/>
<id>ff02f139804f3cb61414f7bbcbfdaa0279e3efae</id>
<content type='text'>
The current ndfc HW ECC implementation swaps the first two ECC bytes.
But the 4xx NDFC already uses the SMC (Smart Media Card) ECC ordering,
so this swapping in the HW ECC driver is bogus. This patch fixes this
problem and now really uses the SMC ECC byte order.

Thanks to Sean MacLennan for pointing this out.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
The current ndfc HW ECC implementation swaps the first two ECC bytes.
But the 4xx NDFC already uses the SMC (Smart Media Card) ECC ordering,
so this swapping in the HW ECC driver is bogus. This patch fixes this
problem and now really uses the SMC ECC byte order.

Thanks to Sean MacLennan for pointing this out.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Fix problem with init-ram bigger than 4k on 440 platforms</title>
<updated>2008-02-04T10:47:40+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2008-01-30T13:48:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=28d77d968bfe0316deb5bf15c17f57d5ff2c8821'/>
<id>28d77d968bfe0316deb5bf15c17f57d5ff2c8821</id>
<content type='text'>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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