u-boot.git/cpu/ppc4xx, branch v2009.08

Dual-license IBM code contributions

2009-08-09T21:15:33+00:00

It was brought to our attention that U-Boot contains code derived from the
IBM OpenBIOS source code originally provided with some of the older PowerPC
4xx development boards.  As a result, the original license of this code has
been carried in the various files for a number of years in the U-Boot project.

IBM is dual-licensing the IBM code contributions already present in U-Boot
under either the terms of the GNU General Public License version 2, or the
original code license already present.

Signed-off-by: Josh Boyer

ppc4xx: Add basic support for AMCC PPC460EX/460GT rev B chips

2009-07-30T05:22:18+00:00

This patch is based on a diff created by Phong Vo from AMCC.

Signed-off-by: Phong Vo 
Signed-off-by: Stefan Roese

ppc4xx: Replace 4xx lowercase SPR references

2009-07-24T04:47:17+00:00

Signed-off-by: Matthias Fuchs 
Signed-off-by: Stefan Roese

Add "chip_config" command for PPC4xx bootstrap configuration

2009-07-24T04:42:32+00:00

This patch adds a generic command for programming I2C bootstrap
eeproms on PPC4xx. An implementation for Canyonlands board is
included.

The command name is intentionally chosen not to be PPC4xx specific.
This way other CPU's/SoC's can implement a similar command under
the same name, perhaps with a different syntax.

Usage on Canyonlands:

=> chip_config
Available configurations (I2C address 0x52):
600-nor          - NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100
600-nand         - NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100
800-nor          - NOR  CPU: 800 PLB: 200 OPB: 100 EBC: 100
800-nand         - NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100
1000-nor         - NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100
1000-nand        - NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100
1066-nor         - NOR  CPU:1066 PLB: 266 OPB:  88 EBC:  88 ***
1066-nand        - NAND CPU:1066 PLB: 266 OPB:  88 EBC:  88
=> chip_config 600-nor
Using configuration:
600-nor          - NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100
done (dump via 'i2c md 52 0.1 10')
Reset the board for the changes to take effect

Other 4xx boards will be migrated to use this command soon
as well.

Signed-off-by: Stefan Roese 
Signed-off-by: Dirk Eibach 
Acked-by: Matthias Fuchs

ppc4xx: Fix missing freqOPB for 405EP

2009-07-24T04:42:31+00:00

In cpu/ppc4xx/speed.c initialization of sysInfo->freqOPB for 405EP was
left out for no obvious reason.

Signed-off-by: Dirk Eibach 
Signed-off-by: Stefan Roese

ppc4xx: Fix TLB reset problem with recent 44x images

2009-07-24T04:42:31+00:00

Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal"
booting on some 44x platforms. This breakage is only noticed in some
cases while powercycling. As it seems, the code in question in start.S
didn't invalidate TLB #0. This makes sense since this TLB is used for
the bootrom mapping. With the patch mentioned above even TLB #0 got
invalidated resulting in an error later on.

This patch now fixes this issue by only invalidating TLB #0 in the RAM-
booting case.

Tested succesfully on Sequoia and Canyonlands.

Signed-off-by: Stefan Roese 
Cc: Dirk Eibach

nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directory

2009-07-16T22:52:02+00:00

Signed-off-by: Stefan Roese 
Cc: Scott Wood 
Signed-off-by: Scott Wood

ppc4xx: Set default PCI device ID for 405EP boards

2009-07-10T06:26:11+00:00

Current code only sets the PCI vendor id to 0x1014 and
leaved device id to 0x0000.

Ths patch ....
a) uses the correct PCI_VENDOR_ID_IBM macro for this
b) sets the default device ID as stated in the UM to 0x0156
   by using PCI_DEVICE_ID_IBM_405GP for this.

Signed-off-by: Matthias Fuchs 
Signed-off-by: Stefan Roese

ppc4xx: Move 405EP pci code from cpu_init_f() to __pci_pre_init()

2009-07-10T06:26:03+00:00

This patch moves some basic PCI initialisation from the 4xx cpu_init_f()
to cpu/ppc4xx/4xx_pci.c.

The original cpu_init_f() function enabled the 405EP's internal arbiter
in all situations. Also the HCE bit in cpc0_pci is always set.
The first is not really wanted for PCI adapter designs and the latter
is a general bug for PCI adapter U-Boots. Because it enables
PCI configuration by the system CPU even when the PCI configuration has
not been setup by the 405EP. The one and only correct place is
in pci_405gp_init() (see "Set HCE bit" comment).

So for compatibility reasons the arbiter is still enabled in any case,
but from weak pci_pre_init() so that it can be replaced by board specific
code.

Signed-off-by: Matthias Fuchs 
Signed-off-by: Stefan Roese

ppc4xx: Make pll_write global

2009-07-08T08:59:07+00:00

This patch makes pll_write on PPC405EP boards
global and callable from C code.

pll_write can be used to dynamically modify the PLB:PCI divider
as it is required for 33/66 MHz pci adapters based on the 405EP.

board_early_init_f() is a good place to do that (check M66EN signal
and call pll_write() when it is required).

Signed-off-by: Matthias Fuchs 
Signed-off-by: Stefan Roese