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<title>u-boot.git/cpu/ppc4xx, branch v2009.11</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>ppc4xx: 44x_spd_ddr2.c: Fix register macro ECCCR -&gt; ECCES (SDRAM_ECCES)</title>
<updated>2009-11-09T12:31:38+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-11-03T13:34:45+00:00</published>
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This error only appears when DEBUG is enabled in this driver. That's why
it went unnoticed till now.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
This error only appears when DEBUG is enabled in this driver. That's why
it went unnoticed till now.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>ppc4xx: Print PCI synchronous clock frequency upon bootup</title>
<updated>2009-10-23T14:04:45+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-10-19T12:44:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=08c6a2628478ace808b3767db17e4148cac5a7fb'/>
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<content type='text'>
Some 4xx variants (e.g. 440EP(x)/GR(x)) have an internal
synchronous PCI clock. Knowledge about the currently configured
value might be helpful. So let's print it out upon bootup.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
Some 4xx variants (e.g. 440EP(x)/GR(x)) have an internal
synchronous PCI clock. Knowledge about the currently configured
value might be helpful. So let's print it out upon bootup.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Add function to check and dynamically change PCI sync clock</title>
<updated>2009-10-23T14:04:36+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-10-19T12:06:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5e47f9535f53fd4cc05f32fb6166870f976fbb4e'/>
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<content type='text'>
PPC440EP(x)/PPC440GR(x):
In asynchronous PCI mode, the synchronous PCI clock must meet
certain requirements. The following equation describes the
relationship that must be maintained between the asynchronous PCI
clock and synchronous PCI clock. Select an appropriate PCI:PLB
ratio to maintain the relationship:

AsyncPCIClk - 1MHz &lt;= SyncPCIclock &lt;= (2 * AsyncPCIClk) - 1MHz

This patch now adds a function to check and reconfigure the sync
PCI clock to meet this requirement. This is in preparation for
some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
function to not violate the PCI clocking rules.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
PPC440EP(x)/PPC440GR(x):
In asynchronous PCI mode, the synchronous PCI clock must meet
certain requirements. The following equation describes the
relationship that must be maintained between the asynchronous PCI
clock and synchronous PCI clock. Select an appropriate PCI:PLB
ratio to maintain the relationship:

AsyncPCIClk - 1MHz &lt;= SyncPCIclock &lt;= (2 * AsyncPCIClk) - 1MHz

This patch now adds a function to check and reconfigure the sync
PCI clock to meet this requirement. This is in preparation for
some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
function to not violate the PCI clocking rules.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Update flash size in reg property of the NOR flash node</title>
<updated>2009-10-23T13:56:32+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-10-16T08:01:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=92b8964bed0d1b779d9e26be4e16755b5c635415'/>
<id>92b8964bed0d1b779d9e26be4e16755b5c635415</id>
<content type='text'>
Till now only the ranges in the ebc node are updated with the values
currently configured in the PPC4xx EBC controller. With this patch now
the NOR flash size is updated in the device tree blob as well. This is
done by scanning the compatible nodes "cfi-flash" and "jedec-flash"
for the correct chip select number.

This size fixup is enabled for all AMCC eval board right now. Other
4xx boards may want to enable it as well, if this problem with multiple
NOR FLASH sizes exists.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
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<pre>
Till now only the ranges in the ebc node are updated with the values
currently configured in the PPC4xx EBC controller. With this patch now
the NOR flash size is updated in the device tree blob as well. This is
done by scanning the compatible nodes "cfi-flash" and "jedec-flash"
for the correct chip select number.

This size fixup is enabled for all AMCC eval board right now. Other
4xx boards may want to enable it as well, if this problem with multiple
NOR FLASH sizes exists.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>cpu/ppc4xx/fdt.c: avoid strcpy() to constant string</title>
<updated>2009-10-23T13:50:22+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2009-10-20T21:12:13+00:00</published>
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<content type='text'>
strcpy() was iused with the target address being a pointer to a
constant string, which potentially is read-only. Use a (writable)
array of characters instead.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
strcpy() was iused with the target address being a pointer to a
constant string, which potentially is read-only. Use a (writable)
array of characters instead.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>Merge branch 'reloc'</title>
<updated>2009-10-08T22:03:18+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2009-10-08T22:03:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cd77dd109c4a439519a78c32eddc42bdebc7a61f'/>
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<pre>
</pre>
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</entry>
<entry>
<title>relocation: Do not relocate NULL pointers.</title>
<updated>2009-10-08T07:33:36+00:00</updated>
<author>
<name>Joakim Tjernlund</name>
<email>Joakim.Tjernlund@transmode.se</email>
</author>
<published>2009-10-08T00:03:51+00:00</published>
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<content type='text'>
NULL is an absolute value and should not be relocated.
After this correction code like:
 void weak_fun(void) __attribute__((weak));
 printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
</content>
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<pre>
NULL is an absolute value and should not be relocated.
After this correction code like:
 void weak_fun(void) __attribute__((weak));
 printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Rework cmd reginfo</title>
<updated>2009-10-07T07:15:26+00:00</updated>
<author>
<name>Niklaus Giger</name>
<email>niklaus.giger@member.fsf.org</email>
</author>
<published>2009-10-04T18:04:21+00:00</published>
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<id>78d2a641371ec71cc3786b167a318c7b115fbb90</id>
<content type='text'>
The command "reginfo" got an overhaul for the ppc4xx. It dumps all the
relevant HW configuration registers (address, symbolic name, content).
This allows to easily detect errors in *.h files and changes in the HW
configuration.

Signed-off-by: Niklaus Giger &lt;niklaus.giger@member.fsf.org&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
The command "reginfo" got an overhaul for the ppc4xx. It dumps all the
relevant HW configuration registers (address, symbolic name, content).
This allows to easily detect errors in *.h files and changes in the HW
configuration.

Signed-off-by: Niklaus Giger &lt;niklaus.giger@member.fsf.org&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc_4xx: Apply new HW register names</title>
<updated>2009-10-07T07:15:20+00:00</updated>
<author>
<name>Niklaus Giger</name>
<email>niklaus.giger@member.fsf.org</email>
</author>
<published>2009-10-04T18:04:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ddc922ff2c20ae0b7f9ce2df1ac28143e2f325bd'/>
<id>ddc922ff2c20ae0b7f9ce2df1ac28143e2f325bd</id>
<content type='text'>
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.

Signed-off-by: Niklaus Giger &lt;niklaus.giger@member.fsf.org&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.

Signed-off-by: Niklaus Giger &lt;niklaus.giger@member.fsf.org&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>ppc4xx: Add PPC405EX(r) Rev D support</title>
<updated>2009-10-07T07:14:27+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-10-06T05:21:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=56f14818f66c68a8b9e45925f29ceb974405ad48'/>
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<content type='text'>
Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older
405EX(r) parts. Here a list:

0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec
0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec

Since there are only a few older parts in the field, this patch now
changes the PVR's above to represent the new Rev D versions.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Phong Vo" &lt;pvo@amcc.com&gt;
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<pre>
Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older
405EX(r) parts. Here a list:

0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec
0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec

Since there are only a few older parts in the field, this patch now
changes the PVR's above to represent the new Rev D versions.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Phong Vo" &lt;pvo@amcc.com&gt;
</pre>
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</entry>
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