u-boot.git/cpu, branch LABEL_2006_06_30_2020 Unnamed repository; edit this file 'description' to name the repository. Fix CONFIG_440_GX define usage. 2006-06-30T16:35:04+00:00 Marian Balakowicz m8@semihalf.com 2006-06-30T16:35:04+00:00 bba68377320608b3c3f7c0fef30452bdaa8b0408 






Merge: Add support for AMCC 440SPe CPU based eval board (Yucca).
2006-06-30T16:19:42+00:00

Marian Balakowicz
m8@semihalf.com

2006-06-30T16:19:42+00:00

f6e5739a68131998a5ae8aa0cf56a0316f810200












Add support for AMCC 440SPe CPU based eval board (Yucca).
2006-06-30T14:30:46+00:00

Marian Balakowicz
m8@semihalf.com

2006-06-30T14:30:46+00:00

6c5879f380be38d85fef0d3aba3353358f4b2ff4












Add support for wrPPMC7xx/74xx boards
2006-06-19T09:02:41+00:00

Heiko Schocher
hs@pollux.denx.de

2006-06-19T09:02:41+00:00

f5e0d03970409feb3c77ab0107d5dece6b7d45c9

  Patch from Richard Danter, 12 Aug 2005





  Patch from Richard Danter, 12 Aug 2005







Merge with ssh://fifi/home/wd/git/u-boot/master
2006-06-18T23:37:03+00:00

Wolfgang Denk
wd@atlas.denx.de

2006-06-18T23:37:03+00:00

a650cfa286e8933144a776693d56dfd858922aa4












Add support for CONFIG_SERIAL_MULTI on MPC5xxx
2006-06-16T15:04:45+00:00

Wolfgang Denk
wd@fifi.denx.de

2006-06-16T15:04:45+00:00

c12cffc543df621c162ba26e012c7f4ab0af496e

Patch by Martin Krause, 8 Jun 2006

This patch supports two serial consoles on boards with
a MPC5xxx CPU. The console can be switched at runtime
by setting stdin, stdout and stderr to the desired serial
interface (serial0 or serial1). The PSCs to be used as
console port are definded by CONFIG_PSC_CONSOLE
and CONFIG_PSC_CONSOLE2.
See README.serial_multi for details.





Patch by Martin Krause, 8 Jun 2006

This patch supports two serial consoles on boards with
a MPC5xxx CPU. The console can be switched at runtime
by setting stdin, stdout and stderr to the desired serial
interface (serial0 or serial1). The PSCs to be used as
console port are definded by CONFIG_PSC_CONSOLE
and CONFIG_PSC_CONSOLE2.
See README.serial_multi for details.







Bugfix in I2C initialisation on S3C2400.
2006-06-16T14:57:18+00:00

Wolfgang Denk
wd@fifi.denx.de

2006-06-16T14:57:18+00:00

30a43cc2aeb84dfd96a411fb2da2ff4ab10dcd5a

If the bus is blocked because of a previously interrupted
transfer, up to eleven clocks are generated on the I2CSCL
line to complete the transfer and to free the bus.
With this fix pin I2CSCL (PG6) is really configured as GPIO
so the clock pulses are really generated.
Patch by Martin Krause, 04 Apr 2006





If the bus is blocked because of a previously interrupted
transfer, up to eleven clocks are generated on the I2CSCL
line to complete the transfer and to free the bus.
With this fix pin I2CSCL (PG6) is really configured as GPIO
so the clock pulses are really generated.
Patch by Martin Krause, 04 Apr 2006







Fix IxEthDB.h to compile again
2006-06-14T08:18:39+00:00

Stefan Roese
sr@denx.de

2006-06-14T08:18:39+00:00

df02bd1b3f2eecca04bfecb62eae7c2ff698506a

Patch by Stefan Roese, 14 Jun 2006





Patch by Stefan Roese, 14 Jun 2006







Minor cleanup for PCS440EP board
2006-06-13T16:55:07+00:00

Stefan Roese
sr@denx.de

2006-06-13T16:55:07+00:00

ed4633c93a01220431b9bf8a69dcaed7b3894023

Patch by Stefan Roese, 13 Jun 2006





Patch by Stefan Roese, 13 Jun 2006







Minor code cleanup.
2006-06-10T20:00:40+00:00

Wolfgang Denk
wd@pollux.denx.de

2006-06-10T20:00:40+00:00

b1d71358a9448802a08bc822b78debe9f754eae7