u-boot.git/cpu, branch v1.3.4-rc2 Unnamed repository; edit this file 'description' to name the repository. 8260: Making the use of gd->pci_clk dependant on the CONFIG_PCI 2008-07-31T09:35:16+00:00 Matvejchikov Ilya matvejchikov@gmail.com 2008-07-30T19:21:19+00:00 9196b44334c330cc13de2464c59181e4db71f549 Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com> 
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
Merge branch 'master' of git://git.denx.de/u-boot-mips 2008-07-29T23:24:07+00:00 Wolfgang Denk wd@denx.de 2008-07-29T23:24:07+00:00 1ca9950b46c0aded14c80f728f6238625d723a19 






Removed support for the adsvix board.
2008-07-29T22:26:03+00:00

Adrian Filipi
adrian.filipi@eurotech.com

2008-07-22T18:28:11+00:00

7610db17fd4d59c51d825488526d85ede2f06767

Support for the adsvix was originally provided by Applied Data
Systems (ADS), inc., now EuroTech, Inc.
The board never shipped aside from some sample boards.

Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>





Support for the adsvix was originally provided by Applied Data
Systems (ADS), inc., now EuroTech, Inc.
The board never shipped aside from some sample boards.

Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>







mips: Fix baudrate divisor computation on alchemy cpus
2008-07-29T15:40:54+00:00

Wolfgang Ocker
weo@reccoware.de

2008-07-28T14:56:51+00:00

dbd32387920e5ad6f9dd58a7b5012bbabe2a6a21

Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor
on alchemy cpus.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>





Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor
on alchemy cpus.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>







microblaze: Fix printf() format issues
2008-07-20T21:10:34+00:00

Michal Simek
monstr@monstr.eu

2008-07-17T10:25:46+00:00

1953d128fd07f07d1c3810a28c0863ea64dae1b6

Signed-off-by: Michal Simek <monstr@monstr.eu>





Signed-off-by: Michal Simek <monstr@monstr.eu>







ppc4xx: Fix incorrect MODTx setup for some DIMM configurations
2008-07-18T13:57:23+00:00

Stefan Roese
sr@denx.de

2008-07-18T13:57:23+00:00

66fe183b1dd9c7534605147a8ecfed1c02345ee5

This patch fixes a problem with incorrect MODTx (On Die Termination)
setup for a configuration with multiple DIMM's and multiple ranks.
Without this change Katmai was unable to boot Linux with DDR2 frequency
>= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux
with DDR2 frequency = 640MHz and mem=4GB.

Signed-off-by: Stefan Roese <sr@denx.de>





This patch fixes a problem with incorrect MODTx (On Die Termination)
setup for a configuration with multiple DIMM's and multiple ranks.
Without this change Katmai was unable to boot Linux with DDR2 frequency
>= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux
with DDR2 frequency = 640MHz and mem=4GB.

Signed-off-by: Stefan Roese <sr@denx.de>







Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
2008-07-15T19:37:23+00:00

Wolfgang Denk
wd@denx.de

2008-07-15T19:37:23+00:00

1d28d48e3df65ef867395eb84ee0498f1c52a384












85xx: Cleanup L2 cache size detection
2008-07-15T01:14:20+00:00

Kumar Gala
galak@kernel.crashing.org

2008-07-14T19:07:00+00:00

73f15a060f67a2462551c334215bd20fac6b81d1

The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors.  Change the sense of detection so we
look for the older processors that aren't changing.

Also added support for 1M cache size on 8572.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>





The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors.  Change the sense of detection so we
look for the older processors that aren't changing.

Also added support for 1M cache size on 8572.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>







8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreq
2008-07-14T23:56:51+00:00

Paul Gortmaker
paul.gortmaker@windriver.com

2008-07-09T17:23:05+00:00

71074abbe0c76429577aff58aeff0a24ad210b23

Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs.  Boards
that do have such a tie should set CFG_NS16550_CLK to be
get_bus_freq(0) -- which most of them do already.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>





Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs.  Boards
that do have such a tie should set CFG_NS16550_CLK to be
get_bus_freq(0) -- which most of them do already.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>







Change the temp map to ROM to align addresses to page size.
2008-07-14T23:46:32+00:00

Andrew Klossner
andrew@cesa.opbu.xerox.com

2008-07-02T14:03:53+00:00

24ef76f320fbadf074105229826514db140f939f

With a page size of BOOKE_PAGESZ_16M, both the real and effective
addresses must be multiples of 16MB.  The hardware silently truncates
them so the code happens to work.  This patch clarifies the situation
by establishing addresses that the hardware doesn't need to truncate.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>





With a page size of BOOKE_PAGESZ_16M, both the real and effective
addresses must be multiples of 16MB.  The hardware silently truncates
them so the code happens to work.  This patch clarifies the situation
by establishing addresses that the hardware doesn't need to truncate.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>