u-boot.git/cpu, branch v2009.03-rc2 Unnamed repository; edit this file 'description' to name the repository. Merge branch 'master' of git://git.denx.de/u-boot-sh 2009-03-15T21:15:13+00:00 Wolfgang Denk wd@denx.de 2009-03-15T21:15:13+00:00 e05825324a8a7679b87db550a0d7ade06c890494 






Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
2009-03-15T21:12:10+00:00

Wolfgang Denk
wd@denx.de

2009-03-15T21:12:10+00:00

45f93d4e3c0d2a083131d1c579908bfeb3011bb1












Merge branch 'master' of git://git.denx.de/u-boot-arm
2009-03-15T21:09:18+00:00

Wolfgang Denk
wd@denx.de

2009-03-15T21:09:18+00:00

06ecf088478aed889a4153978c2e30fb02cf41ea












Merge branch 'master' of git://git.denx.de/u-boot-pxa
2009-03-15T21:08:07+00:00

Wolfgang Denk
wd@denx.de

2009-03-15T21:08:07+00:00

cd309029f2b8a1a09c484c5766e897b8791c7cfe












mpc83xx: Add bank configuration to FSL spd_sdram.c
2009-03-14T22:44:07+00:00

Jerry Van Baren
gvb.uboot@gmail.com

2009-03-13T15:40:10+00:00

394d30dd1ee23b80fd5e59e17ebe0feca927ab31

The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8
bank SDRAMs.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>





The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8
bank SDRAMs.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>







mpc83xx: correctly set encryption and I2C bus 0 clock
2009-03-14T22:43:58+00:00

Norbert van Bolhuis
nvbolhuis@aimvalley.nl

2009-03-13T07:58:14+00:00

b581626c1e2474a3dadf69d4f0e0582eccbc4235

This patch makes sure the correct mask is applied when setting
the encryption and I2C bus 0 clock in SCCR.
Failing to do so may lead to ENCCM being 0 in which case I2C bus 0
won't function.

Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>





This patch makes sure the correct mask is applied when setting
the encryption and I2C bus 0 clock in SCCR.
Failing to do so may lead to ENCCM being 0 in which case I2C bus 0
won't function.

Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>







OMAP3: Add support for OMAP3 die ID
2009-03-13T22:17:43+00:00

Dirk Behme
dirk.behme@googlemail.com

2009-03-12T18:30:50+00:00

e6a6a704151c2d7e4a7b485545b48a6020ccca17

Read and store OMAP3 die ID in U-Boot environment.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>





Read and store OMAP3 die ID in U-Boot environment.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>







sh: Add netdev header fixing of warning/build
2009-03-12T14:58:30+00:00

Nobuhiro Iwamatsu
iwamatsu.nobuhiro@renesas.com

2009-02-27T09:35:41+00:00

64f3c0b8ba99d6651db59273e497ab5e857c8d4f

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>





Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>







Fix mpc85xx ddr-gen3 ddr_sdram_cfg.
2009-03-09T22:46:09+00:00

Ed Swarthout
Ed.Swarthout@freescale.com

2009-02-24T08:37:59+00:00

0ee84b88b78bce425190d8cd7adf4c30cba0c2f0

Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>





Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>







PXA: timer use do_div and simplify it
2009-03-09T11:01:32+00:00

Jean-Christophe PLAGNIOL-VILLARD
plagnioj@jcrosoft.com

2009-02-24T05:13:10+00:00

a922fdb87af25c25c032424908dcf60fbf3250ea

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>





Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>