u-boot.git/doc/README.fsl-ddr, branch master Unnamed repository; edit this file 'description' to name the repository. global: Migrate CONFIG_EXTRA_ENV_SETTINGS to CFG 2022-12-23T15:09:42+00:00 Tom Rini trini@konsulko.com 2022-12-04T15:03:50+00:00 0613c36a7a5973d58a50b764ee647099e80cc97d Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS Signed-off-by: Tom Rini <trini@konsulko.com> 
Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS

Signed-off-by: Tom Rini <trini@konsulko.com>
post: Migrate to Kconfig 2022-12-05T21:11:50+00:00 Tom Rini trini@konsulko.com 2022-11-19T23:45:44+00:00 9cebc4ad8ebe6832c6d0eca786a85533a3b54ce4 We move the existing CONFIG_POST_* functionality over to CFG_POST and then introduce CONFIG_POST to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
We move the existing CONFIG_POST_* functionality over to CFG_POST and
then introduce CONFIG_POST to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete 2016-03-21T19:42:13+00:00 Shengzhou Liu Shengzhou.Liu@nxp.com 2016-03-10T09:36:56+00:00 eb118807a4c1778bda6294c36e379711cb08e198 Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> 
Add support of address parity for DDR4 UDIMM or discrete memory.
It requires to configurate corresponding MR5[2:0] and
TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig,
e.g. hwconfig=fsl_ddr:parity=on.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Use correct spelling of "U-Boot" 2016-02-06T11:00:59+00:00 Bin Meng bmeng.cn@gmail.com 2016-02-06T03:30:11+00:00 a187559e3d586891c917279044c5386d1b2adc6e Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> 
Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
README.fsl-ddr typos and update to reflect hotkey 2013-01-30T17:25:13+00:00 James Yang James.Yang@freescale.com 2013-01-04T08:14:03+00:00 02a9ce7187bae8f4dafcc8201d85e12d073f8151 Documentation fix to README.fsl-ddr to fix typos and to reflect use of 'd' hotkey to enter the FSL DDR debugger. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> 
Documentation fix to README.fsl-ddr to fix typos and
to reflect use of 'd' hotkey to enter the FSL DDR debugger.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add copy command to FSL DDR interactive 2013-01-30T17:25:13+00:00 James Yang James.Yang@freescale.com 2013-01-04T08:14:02+00:00 5926ee3800b3b09026993117318e09a8ddc33e2e Add copy command which allows copying of DIMM/controller settings. This saves tedious retyping of parameters for each identical DIMM or controller. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> 
Add copy command which allows copying of DIMM/controller settings.
This saves tedious retyping of parameters for each identical DIMM
or controller.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
powerpc/mpc8xxx: Enable entering DDR debugging by key press 2013-01-30T17:25:12+00:00 York Sun yorksun@freescale.com 2013-01-04T08:13:59+00:00 e750cfaa01f195be3f3bf16d7f1be7b99b587351 Using environmental variable "ddr_interactive" to activate interactive DDR debugging seomtiems is not enough. For example, after updating SPD with a valid but wrong image, u-boot won't come up due to wrong DDR configuration. By enabling key press method, we can enter debug mode to have a chance to boot without using other tools to recover the board. CONFIG_FSL_DDR_INTERACTIVE needs to be defined in header file. To enter the debug mode by key press, press key 'd' shortly after reset, like one would do to abort auto booting. It is fixed to lower case 'd' at this moment. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> 
Using environmental variable "ddr_interactive" to activate interactive DDR
debugging seomtiems is not enough. For example, after updating SPD with a
valid but wrong image, u-boot won't come up due to wrong DDR configuration.
By enabling key press method, we can enter debug mode to have a chance to
boot without using other tools to recover the board.

CONFIG_FSL_DDR_INTERACTIVE needs to be defined in header file. To enter the
debug mode by key press, press key 'd' shortly after reset, like one would
do to abort auto booting. It is fixed to lower case 'd' at this moment.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
powerpc/mpc8xxx: Add auto select bank interleaving mode 2012-10-22T19:31:30+00:00 York Sun yorksun@freescale.com 2012-10-08T07:44:27+00:00 89b78095681fd3dfd359082ba62d80551a114ab0 Based on populated DIMMs, automatically select from cs0_cs1_cs2_cs3 or cs0_cs1 interleaving, or non-interleaving if not available. Fix the message of interleaving disabled if controller interleaving is enabled but DIMMs don't support it. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> 
Based on populated DIMMs, automatically select from cs0_cs1_cs2_cs3 or
cs0_cs1 interleaving, or non-interleaving if not available.

Fix the message of interleaving disabled if controller interleaving
is enabled but DIMMs don't support it.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving 2012-08-23T17:16:55+00:00 York Sun yorksun@freescale.com 2012-08-17T08:22:39+00:00 a4c66509f1b95884e5753d5a30cf2cf884adb821 Restructure DDR interleaving option to support 3 and 4 DDR controllers for 2-, 3- and 4-way interleaving. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> 
Restructure DDR interleaving option to support 3 and 4 DDR controllers
for 2-, 3- and 4-way interleaving.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
doc: Fix some typos in different files 2012-03-27T11:31:37+00:00 Thomas Weber thomas@tomweber.eu 2012-03-24T22:44:01+00:00 c46bf09e0b567dda477da53163fe646e66c4912e adresses/addresses alernate/alternate asssuming/assuming calcualted/calculated enviroment/environment evalutation/evaluation falsh/flash labled/labeled paramaters/parameters Signed-off-by: Thomas Weber <thomas@tomweber.eu> Acked-by: Anatolij Gustschin <agust@denx.de> 
adresses/addresses
alernate/alternate
asssuming/assuming
calcualted/calculated
enviroment/environment
evalutation/evaluation
falsh/flash
labled/labeled
paramaters/parameters

Signed-off-by: Thomas Weber <thomas@tomweber.eu>
Acked-by: Anatolij Gustschin <agust@denx.de>