u-boot.git/doc/SPI, branch master Unnamed repository; edit this file 'description' to name the repository. doc: board: ti: Move documentation from README to .rst 2023-09-09T04:12:47+00:00 Neha Malcom Francis n-francis@ti.com 2023-09-08T09:36:16+00:00 7314ba2bf8452df68d07f251aa59440de58067b0 Make the conversion for all existing TI documentation from README to .rst Signed-off-by: Neha Malcom Francis <n-francis@ti.com> 
Make the conversion for all existing TI documentation from README to
.rst

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
sandbox: update documents regarding spi_sf 2020-05-30T02:55:45+00:00 AKASHI Takahiro takahiro.akashi@linaro.org 2020-04-27T06:46:45+00:00 5e61c4e89d252e7d909d0129682ea48516912e6c Since the commit 1289e96797bf ("sandbox: spi: Drop command-line SPI option"), "--spi_sf" command line option is no longer supported. So update the following documents to sync them up with the change. doc/arch/sandbox.rst doc/SPI/README.sandbox-spi Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> 
Since the commit 1289e96797bf ("sandbox: spi: Drop command-line SPI
option"), "--spi_sf" command line option is no longer supported.

So update the following documents to sync them up with the change.
	doc/arch/sandbox.rst
	doc/SPI/README.sandbox-spi

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
configs: Don't use SPI_FLASH_BAR as default 2019-02-07T10:03:22+00:00 Vignesh R vigneshr@ti.com 2019-02-05T05:59:28+00:00 6d82517836418f984b7b4c05cf1427d7b49b1169 Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed 
Now that new SPI NOR layer uses stateless 4 byte opcodes by default,
don't enable SPI_FLASH_BAR. For SPI controllers that cannot support
4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c,
renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to
not break functionality.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
configs: Remove SF_DUAL_FLASH 2019-02-07T10:03:21+00:00 Vignesh R vigneshr@ti.com 2019-02-05T05:59:27+00:00 75b2ec2a22964c7e8c51b2e4c903284fe6013b4f SF_DUAL_FLASH claims to enable support for SF_DUAL_STACKED_FLASH and SF_DUAL_PARALLEL_FLASH. But, in current U-Boot code, grepping for above enums yield no user and therefore support seems to be incomplete. Remove these configs so as to avoid confusion. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed 
SF_DUAL_FLASH claims to enable support for SF_DUAL_STACKED_FLASH and
SF_DUAL_PARALLEL_FLASH. But, in current U-Boot code, grepping for above
enums yield no user and therefore support seems to be incomplete. Remove
these configs so as to avoid confusion.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Fix various typos, scattered over the code. 2016-05-06T01:39:26+00:00 Robert P. J. Day rpjday@crashcourse.ca 2016-05-04T08:47:31+00:00 1cc0a9f49657734c54939f03fc1e3ca0ec9d7eef Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller 
Spelling corrections for (among other things):

* environment
* override
* variable
* ftd (should be "fdt", for flattened device tree)
* embedded
* FTDI
* emulation
* controller
Use correct spelling of "U-Boot" 2016-02-06T11:00:59+00:00 Bin Meng bmeng.cn@gmail.com 2016-02-06T03:30:11+00:00 a187559e3d586891c917279044c5386d1b2adc6e Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> 
Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
spi: altera: Add short note about EPCS/EPCQx1 2014-10-27T17:07:03+00:00 Marek Vasut marex@denx.de 2014-10-22T19:56:03+00:00 df155672ff262dd779ef12c04d9fc1911b778990 Add short documentation-alike note on how to use the Altera SPI driver with the EPCS/EPCQx1 FPGA IP block on SoCFPGA Cyclone V into doc/SPI/README.altera_spi Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Pavel Machek <pavel@denx.de> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> 
Add short documentation-alike note on how to use the Altera SPI
driver with the EPCS/EPCQx1 FPGA IP block on SoCFPGA Cyclone V
into doc/SPI/README.altera_spi

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Pavel Machek <pavel@denx.de>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
doc: SPI: Add qspi test details on AM43xx 2014-02-18T17:11:09+00:00 Sourav Poddar sourav.poddar@ti.com 2013-12-21T07:20:11+00:00 9ea09e20376abbca21760ed4ba87d6b5c4df465c This shows the log obtained while testing qspi on AM437x board. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> 
This shows the log obtained while testing qspi on AM437x  board.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
doc: SPI: Update status.txt 2014-01-12T16:10:23+00:00 Jagannadha Sutradharudu Teki jaganna@xilinx.com 2014-01-08T17:34:44+00:00 736ce857da3ecaa375130beede6a18000251ada8 Updated current SPI subsyetem status. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> 
Updated current SPI subsyetem status.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
sf: Add dual memories support - DUAL_PARALLEL 2014-01-12T16:10:22+00:00 Jagannadha Sutradharudu Teki jaganna@xilinx.com 2014-01-06T18:41:35+00:00 056fbc73d54df64adcb93c513cba708acb2683bd This patch added support for accessing dual memories in parallel connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> 
This patch added support for accessing dual memories in
parallel connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>