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<title>u-boot.git/doc/SPI, branch v2014.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>doc: SPI: Update status.txt</title>
<updated>2014-01-12T16:10:23+00:00</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jaganna@xilinx.com</email>
</author>
<published>2014-01-08T17:34:44+00:00</published>
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<id>736ce857da3ecaa375130beede6a18000251ada8</id>
<content type='text'>
Updated current SPI subsyetem status.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
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<pre>
Updated current SPI subsyetem status.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</pre>
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</entry>
<entry>
<title>sf: Add dual memories support - DUAL_PARALLEL</title>
<updated>2014-01-12T16:10:22+00:00</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jaganna@xilinx.com</email>
</author>
<published>2014-01-06T18:41:35+00:00</published>
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<content type='text'>
This patch added support for accessing dual memories in
parallel connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
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<pre>
This patch added support for accessing dual memories in
parallel connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>sf: Add dual memories support - DUAL_STACKED</title>
<updated>2014-01-12T16:10:11+00:00</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jaganna@xilinx.com</email>
</author>
<published>2014-01-12T16:10:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f77f469117ab3184ac45683a50dc446265be28cc'/>
<id>f77f469117ab3184ac45683a50dc446265be28cc</id>
<content type='text'>
This patch added support for accessing dual memories in
stacked connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
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<pre>
This patch added support for accessing dual memories in
stacked connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>spi: Add Faraday SPI controller support</title>
<updated>2014-01-11T06:51:30+00:00</updated>
<author>
<name>Kuo-Jung Su</name>
<email>dantesu@faraday-tech.com</email>
</author>
<published>2013-12-20T07:24:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=66cb9eb1d6372b0d39b793688f80db5834d3ffab'/>
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<content type='text'>
The Faraday FTSSP010 is a multi-function controller
which supports I2S/SPI/SSP/AC97/SPDIF. However This
patch implements only the SPI mode.

NOTE:
The DMA and CS/Clock control logic has been altered
since hardware revision 1.19.0. So this patch
would first detects the revision id of the underlying
chip, and then switch to the corresponding software
control routines.

Signed-off-by: Kuo-Jung Su &lt;dantesu@faraday-tech.com&gt;
Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
CC: Tom Rini &lt;trini@ti.com&gt;
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<pre>
The Faraday FTSSP010 is a multi-function controller
which supports I2S/SPI/SSP/AC97/SPDIF. However This
patch implements only the SPI mode.

NOTE:
The DMA and CS/Clock control logic has been altered
since hardware revision 1.19.0. So this patch
would first detects the revision id of the underlying
chip, and then switch to the corresponding software
control routines.

Signed-off-by: Kuo-Jung Su &lt;dantesu@faraday-tech.com&gt;
Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
CC: Tom Rini &lt;trini@ti.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>spi: Add support SH Quad SPI driver</title>
<updated>2013-12-18T17:53:41+00:00</updated>
<author>
<name>Nobuhiro Iwamatsu</name>
<email>nobuhiro.iwamatsu.yj@renesas.com</email>
</author>
<published>2013-12-18T06:31:55+00:00</published>
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<id>16f47c9c510a61ee91d6b9d02dd723522beff80f</id>
<content type='text'>
This patch adds a driver for Renesas SoC's Quad SPI bus.
This supports with 8 bits per transfer to use with SPI flash.

Signed-off-by: Kouei Abe &lt;kouei.abe.cp@renesas.com&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;
Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
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<pre>
This patch adds a driver for Renesas SoC's Quad SPI bus.
This supports with 8 bits per transfer to use with SPI flash.

Signed-off-by: Kouei Abe &lt;kouei.abe.cp@renesas.com&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;
Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>sandbox: spi: Add new SPI flash driver</title>
<updated>2013-12-09T19:22:39+00:00</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2013-12-03T23:43:27+00:00</published>
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<id>ffdb20bea16e00a326cc3d106f275e58bf302a0c</id>
<content type='text'>
This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write.  Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
enough to merge now.

sjg@chromium.org added a README and tidied up code a little.
Added a required map_sysmem() for sandbox.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write.  Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
enough to merge now.

sjg@chromium.org added a README and tidied up code a little.
Added a required map_sysmem() for sandbox.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>doc: SPI: Update SPI status track</title>
<updated>2013-10-07T14:05:10+00:00</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jaganna@xilinx.com</email>
</author>
<published>2013-10-07T12:03:20+00:00</published>
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<id>3cfcf774c270ecf6289203d88f859d1f91cb318e</id>
<content type='text'>
Updated SPI/status.txt, with memory_map and TODO.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
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<pre>
Updated SPI/status.txt, with memory_map and TODO.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>README: qspi usecase and testing documentation.</title>
<updated>2013-10-07T12:25:52+00:00</updated>
<author>
<name>Poddar, Sourav</name>
<email>sourav.poddar@ti.com</email>
</author>
<published>2013-10-07T10:23:04+00:00</published>
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<id>2f24223ae150d9496694885cee401f4525b72acb</id>
<content type='text'>
Contains documentation and testing details for qspi flash
interface.

Signed-off-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
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<pre>
Contains documentation and testing details for qspi flash
interface.

Signed-off-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</pre>
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</entry>
<entry>
<title>doc: SPI: Add status.txt for tracking SPI subsys status</title>
<updated>2013-10-07T12:25:50+00:00</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jaganna@xilinx.com</email>
</author>
<published>2013-09-26T10:25:52+00:00</published>
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<id>364995499c14461c59bc16031b2a8f618f520b32</id>
<content type='text'>
doc/SPI/status.txt added to track the u-boot SPI subsystem status.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
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<pre>
doc/SPI/status.txt added to track the u-boot SPI subsystem status.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</pre>
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