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<title>u-boot.git/doc/api/interrupt.rst, branch v2026.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/doc/api/interrupt.rst?h=v2026.07</id>
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<updated>2023-11-02T08:22:06Z</updated>
<entry>
<title>riscv: allow resume after exception</title>
<updated>2023-11-02T08:22:06Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2023-10-31T12:55:51Z</published>
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<content type='text'>
If CSRs like seed are readable by S-mode, may not be determinable by
S-mode. For safe driver probing allow to resume via a longjmp after an
exception.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
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