u-boot.git/doc/board/ti, branch master

Merge patch series "ti: j7: Update to v0.12.0 of DDR config tool"

2026-06-09T16:26:36Z

Neha Malcom Francis says: Update all DDR configuration DTSIs to the latest auto-generated output of the Sysconfig Tool (DDR Configuration for TDA4x, DRA8x, AM67x, AM68x, AM69x (0.12.00.0000)) [0] The auto-generated files must not be modified, but effort will be taken to change the tool output to adhere to the latest checkpatch.pl rules. J722S and J721E will also be updated in a subsequent series. All the changes have been kernel boot tested and memtester has passed (same as v1, as no functional changes made). [0] https://dev.ti.com/sysconfig/#/start Link: https://lore.kernel.org/r/20251103071035.674604-1-n-francis@ti.com

doc: ti: k3: Add section for DDR configuration

2026-06-09T16:26:21Z

Add a concise section for DDR configuration pointing to the public tool that can be used to generate the configuration DTSI. Signed-off-by: Neha Malcom Francis Reviewed-by: Romain Naour

doc: board: ti: k3: Add fTPM support documentation

2026-05-01T08:30:32Z

Add fTPM support documentation including an overview, configuration steps for RPMB provisioning, OP-TEE TA build instructions, and verification procedure. Signed-off-by: Shiva Tripathi

doc: board: ti: j784s4_evm: Automate BAR address lookup for PCIe Boot

2026-04-17T06:16:03Z

When the J784S4-EVM is configured for PCIe Boot, the Bootloaders are to be written to the address specified by particular BARs. The existing documentation hard-codes the address corresponding to the BAR under the assumption that the Root-Complex transferring the Bootloaders is also a J784S4-EVM. The Root-Complex assigns addresses to the BARs depending on the currently available set of free system addresses. Since the free system addresses vary with the Root-Complex being used, instead of hard-coding the BARs, automate the process of identifying the appropriate BAR in the form of a command to be run by the user on the Root-Complex. Signed-off-by: Siddharth Vadapalli

Merge branch 'next'

2026-04-06T18:16:57Z

doc: board: ti: fix incorrect labels for boot switches

2026-03-27T09:56:01Z

The labels for the boot mode switches were incorreclty documented for some TI boards, this patch fixes them as per the official user guides linked below: AM62x https://www.ti.com/lit/ug/spruj40e/spruj40e.pdf AM62dx https://www.ti.com/lit/ug/sprujg2/sprujg2.pdf AM62ax https://www.ti.com/lit/ug/spruj66b/spruj66b.pdf AM62px https://www.ti.com/lit/ug/spruj40e/spruj40e.pdf AM6254atl https://www.ti.com/lit/ug/spruja1a/spruja1a.pdf Signed-off-by: Anshul Dalal

doc: board: fix OPTEE args for TI SoCs

2026-03-27T09:55:46Z

CFG_WITH_SOFTWARE_PRNG=y was added as an OPTEE argument to workaround some bugs related to TRNG which have been fixed now[1]. Therefore this patch drops the redundant argument from the documentation. [1]: https://github.com/OP-TEE/optee_os/commit/e313f4765fd0478bb66985827441411793433773 Signed-off-by: Anshul Dalal Acked-by: Francesco Dolcini # Toradex Verdin AM62

Merge patch series "Add PCIe Boot support for TI J784S4 SoC"

2026-03-16T14:24:18Z

Siddharth Vadapalli says: This series adds PCIe endpoint boot support for the TI J784S4 SoC. Series is based on commit f9ffeec4bdc ("board: toradex: Make A53 get RAM size from DT in K3 boards") of the master branch of U-Boot. PCIe Boot Logs (J784S4-EVM running Linux as Root-Complex transfers bootloaders to another J784S4-EVM configured for PCIe Boot): https://gist.github.com/Siddharth-Vadapalli-at-TI/2d157003818441fe79a139d0dec1058a Link: https://lore.kernel.org/r/20260216102858.2745657-1-s-vadapalli@ti.com

docs: board: ti: j784s4_evm: Add PCIe boot documentation

2026-03-16T14:24:04Z

Add PCIe boot documentation for J784S4-EVM including boot mode switch settings, hardware setup requirements, endpoint configuration details and step-by-step boot procedure. Signed-off-by: Hrushikesh Salunke [s-vadapalli@ti.com: simplified and documented the pcie_boot_util program] Co-developed-by: Siddharth Vadapalli Signed-off-by: Siddharth Vadapalli Reviewed-by: Udit Kumar

Merge patch series "k3_*: Add config fragments for inline ECC and BIST"

2026-03-13T22:17:15Z

Neha Malcom Francis says: Typically we do not enable these configs by default but would still like to have the option to start building them in our default build flow for testing. Also there is the added advantage of users being able to see what is needed in case they choose to enable these features. Link: https://lore.kernel.org/r/20260226122508.2269682-1-n-francis@ti.com