u-boot.git/doc/board, branch v2023.07

Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region

2023-05-30T19:13:43Z

In non-combined boot flow for K3, all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked. The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents. The commit changes R5 MCU scratchpad for j721e to an SRAM region. Old Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c85b20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf5bfc) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc) New Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ EMPTY │ ├─────────────────────────────────────┤ 0x41c81920 │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ ├─────────────────────────────────────┤ 0x41c85920 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf59f0) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ 0x41cff9fc │ NEW MCU SCRATCHPAD │ │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc) Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT") Signed-off-by: Manorit Chawdhry [n-francis@ti.com: SRAM allocation addressing diagram] Signed-off-by: Neha Francis Reviewed-by: Tom Rini Reviewed-by: Kamlesh Gurudasani

doc: renesas: add Renesas board docs

2023-05-13T02:24:05Z

As a starting point, list all currently supported Renesas boards. For the RZ/N1 board, add details about booting and flashing. Signed-off-by: Ralph Siemsen Reviewed-by: Marek Vasut

x86: coreboot: Document how to enable the debug UART

2023-05-11T02:25:29Z

This is not obvious so add a little note about how it works. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

doc: rockchip: update list of Radxa ROCK (Pi) 4 boards

2023-05-09T14:50:01Z

add Radxa ROCK (Pi) 4 variants. Signed-off-by: FUKAUMI Naoki Reviewed-by: Kever Yang

board: rockchip: add Anbernic RGXX3 Series Devices

2023-05-06T09:45:05Z

The Anbernic RGxx3 is a "pseudo-device" that encompasses the following devices: - Anbernic RG353M - Anbernic RG353P - Anbernic RG353V - Anbernic RG353VS - Anbernic RG503 The rk3566-anbernic-rgxx3.dtsi is synced with upstream Linux, but rk3566-anbernic-rgxx3.dts is a U-Boot specific devicetree that is used for all RGxx3 devices. Via the board.c file, the bootloader automatically sets the correct fdtfile, board, and board_name environment variables so that the correct devicetree can be passed to Linux. It is also possible to simply hard-code a single devicetree in the boot.scr file and use that to load Linux as well. The common specifications for each device are: - Rockchip RK3566 SoC - 2 external SDMMC slots - 1 USB-C host port, 1 USB-C peripheral port - 1 mini-HDMI output - MIPI-DSI based display panel - ADC controlled joysticks with a GPIO mux - GPIO buttons - A PWM controlled vibrator - An ADC controlled button All of the common features are defined in the devicetree synced from upstream Linux. TODO: DSI panel auto-detection for the RG353 devices (requires porting of DSI controller driver and DSI-DPHY driver to send DSI commands to the panel). Signed-off-by: Chris Morgan Reviewed-by: Kever Yang

doc: correct HiFive Unmatched boot description

2023-05-04T07:57:43Z

Main U-Boot is loaded by sector number, not by partition GUID type. Fixes: 70415e1e528d ("board: sifive: add HiFive Unmatched board support") Signed-off-by: Heinrich Schuchardt

doc: fix StarFive VisionFive v2 documentation

2023-05-04T07:57:43Z

The number of the partition that U-Boot SPL loads the main U-Boot from is defined as 2 by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2. The partition type GUID is not used currently. Reword the description of the boot process to make it clearer. Fixes: 5ecf9b0b8a75 ("board: starfive: add StarFive VisionFive v2 board support") Signed-off-by: Heinrich Schuchardt

doc: Indicate required OpenSBI release for VisionFive 2

2023-05-04T07:57:43Z

Support for the VisionFive 2 board is not contained in the most recent OpenSBI release (v1.2). Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang

Merge tag 'u-boot-imx-20230503' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

2023-05-03T17:15:12Z

u-boot-imx-20230503 ------------------- - Fixes for : pico-imx6ul, smegw01 - new boards: DMSSE20, Reform 2 - fix: get_boot_device, PLL video rate CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16211

board: Fix documentation for Snapdragon based Samsung and Qualcomm boards

2023-05-03T13:05:22Z

The current documentation for Snapdragon based Samsung and Qualcomm boards is vague in the sense that at one place it mentions that u-boot can be used as a replacement for ABL bootloader and at another it mentions that u-boot is loaded as an Android boot image through ABL. Fix the same. Signed-off-by: Bhupesh Sharma Reviewed-by: Sumit Garg