Now that Linux has accepted these tags, move U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add support for new compatible "st,stm32mp13-ddr" to manage the
DDR sub system (Controller and PHY) in STM32MP13x SOC:
- only one AXI port
- support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2)

The STM32MP15x SOC have 2 AXI ports and 32 bits support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional parameter "st,phy-cal"

After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

With device tree binding migration to yaml it is difficult to synchronize
the binding from Linux kernel to U-Boot.

Instead of maintaining the same dt bindings, this patch adds in the U-Boot
documentation the path to the device tree bindings in Linux kernel for
STMicroelectronics devices, when they are used without modification.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Add links for referenced text files.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

This parameter "st,phy-cal" becomes optional and when it is
absent the built-in PHY calibration is done.

It is the case in the helper dtsi file "stm32mp15-ddr.dtsi"
except if DDR_PHY_CAL_SKIP is defined.

This patch also impact the ddr interactive mode
- the registers of the param 'phy.cal' are initialized to 0 when
  "st,phy-cal" is not present in device tree (default behavior when
  DDR_PHY_CAL_SKIP is not activated)
- the info 'cal' field can be use to change the calibration behavior
  - cal=1 => use param phy.cal to initialize the PHY, built-in training
             is skipped
  - cal=0 => param phy.cal is absent, built-in training is used (default)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>

Force alignment of the size of parameters array with
the expected value in the binding, that allows compilation
error when the array size change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>

Allow fractional support in DDR tools.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>

Alignment with kernel directory name as it have already bindings for
DDR controllers in the directory:
Documentation/devicetree/bindings/memory-controller

PS: the drivers using RAM u-class should be associated with
    this binding directory

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>