u-boot.git/doc/device-tree-bindings/serial, branch v2022.04 Unnamed repository; edit this file 'description' to name the repository. serial: qcom: add support for GENI serial driver 2021-10-31T12:46:44+00:00 Dzmitry Sankouski dsankouski@gmail.com 2021-10-17T10:44:27+00:00 324df15a292e938d9341df94e2192a4a465c714e Generic Interface (GENI) Serial Engine (SE) based uart can be found on newer qualcomm SOCs, starting from SDM845. Tested on Samsung SM-G9600(starqltechn) by chain-loading u-boot with stock bootloader. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com> 
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
msm_serial: Read bit rate register value from DT 2020-07-29T12:43:40+00:00 Robert Marko robert.marko@sartura.hr 2020-07-06T08:37:55+00:00 185dcf7f56dde4953ccb8b43355355e86376efb8 IPQ40xx and currently supported Snapdragon boards don't use the same one so enable reading it from DT, if no DT property is found default value is the same as the previous define. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> 
IPQ40xx and currently supported Snapdragon boards don't use the same one
so enable reading it from DT, if no DT property is found default value
is the same as the previous define.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
m68k: add basic set of devicetrees 2019-05-24T03:14:38+00:00 Angelo Dureghello angelo@sysam.it 2019-03-13T20:46:41+00:00 b5867b1a7a4c45c6a5a6a97f866dd180631ebf2b This patch adds a basic group of devicetrees, one for each cpu family, including actually just uart and dspi devices, since these are the drivers supporting devicetree (support added in this patch-set). Acked-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Angelo Dureghello <angelo@sysam.it> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> 
This patch adds a basic group of devicetrees, one for each
cpu family, including actually just uart and dspi devices,
since these are the drivers supporting devicetree (support
added in this patch-set).

Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
serial: pl01x: expose skip_init platdata option in DT 2016-11-29T01:09:47+00:00 Fabian Vogt fvogt@suse.com 2016-09-26T12:26:45+00:00 165316e38f7391b9269d2539edc1cceac25c16cc To be able to represent the skip-init platdata element with OF_CONTROL, it needs to be read from the device tree as well and put into the platform data. Cc: Eric Anholt <eric@anholt.net> Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
To be able to represent the skip-init platdata element with OF_CONTROL,
it needs to be read from the device tree as well and put into the platform data.

Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
serial: bcm283x_mu: add device tree support 2016-11-29T01:09:46+00:00 Fabian Vogt fvogt@suse.com 2016-09-26T12:26:44+00:00 9f755f5d09b8739441265d56ac1081e0fba2b21f This patch adds device tree support for the bcm283x mini-uart driver. Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
This patch adds device tree support for the bcm283x mini-uart driver.

Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
dm: imx: serial: support device tree 2016-10-07T10:26:14+00:00 Stefan Agner stefan.agner@toradex.com 2016-10-05T22:27:03+00:00 a99546ab6294e11b71dfbeee7f2432b1f028f65d Support instatiation through device tree. Also parse the fsl,dte-mode property to determine whether DTE mode shall be used. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Support instatiation through device tree. Also parse the fsl,dte-mode
property to determine whether DTE mode shall be used.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
serial_sh: Add standrad SCI (w/o FIFO) support 2016-07-08T20:51:57+00:00 Yoshinori Sato ysato@users.sourceforge.jp 2016-04-18T07:51:05+00:00 747431b9d54d3ebdef87352006218ed948011612 Add support for standard type SCI (without FIFO) port. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 
Add support for standard type SCI (without FIFO) port.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
serial_sh: Device Tree support 2016-07-08T20:51:57+00:00 Yoshinori Sato ysato@users.sourceforge.jp 2016-04-18T07:51:04+00:00 359787cfe48b066ba96b1062a1a85772464939d6 Add Device Tree bindings. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 
Add Device Tree bindings.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
drivers: serial: add serial driver for ar933x SOC 2016-05-20T23:25:50+00:00 Wills Wang wills.wang@live.com 2016-03-16T08:59:57+00:00 60b49761e9d2f0d16ac5cef934504bc895ac3913 This patch add support for ar933x serial. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
This patch add support for ar933x serial.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
armv8: LS2080A: Consolidate LS2080A and LS2085A 2016-04-06T17:26:46+00:00 York Sun york.sun@nxp.com 2016-04-04T18:41:26+00:00 3c1d218a1d3048fb576677c47eab43049d0b7778 LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> 
LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>