<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/doc/device-tree-bindings, branch v2015.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>cros-ec-keyboard: Synchronize DT binding from linux</title>
<updated>2015-01-06T00:45:16+00:00</updated>
<author>
<name>Sjoerd Simons</name>
<email>sjoerd.simons@collabora.co.uk</email>
</author>
<published>2014-11-27T15:34:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9332274989009b213a405134202088e1bd81fe51'/>
<id>9332274989009b213a405134202088e1bd81fe51</id>
<content type='text'>
The ChromeOS EC keyboard is used by various different chromebooks. Peach
pi being the third board in the u-boot tree to use it (snow and peach
pit the other two). Rather then embedding the same big DT node in the
peach-pi DT again, copy the dtsi snippit &amp; bindings documentation from
linux and include it in all 3 boards.

This slightly changes the dt bindings in u-boot:
  * google,key-rows becomes keypad,num-rows
  * google,key-colums becomes keypad,num-colums
  * google,repeat-delay-ms and google,repeat-rate-ms are no longer used
    and replaced by hardcoded values (similar to tegra kbc)

Signed-off-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ChromeOS EC keyboard is used by various different chromebooks. Peach
pi being the third board in the u-boot tree to use it (snow and peach
pit the other two). Rather then embedding the same big DT node in the
peach-pi DT again, copy the dtsi snippit &amp; bindings documentation from
linux and include it in all 3 boards.

This slightly changes the dt bindings in u-boot:
  * google,key-rows becomes keypad,num-rows
  * google,key-colums becomes keypad,num-colums
  * google,repeat-delay-ms and google,repeat-rate-ms are no longer used
    and replaced by hardcoded values (similar to tegra kbc)

Signed-off-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Add initial video device init for Intel GMA</title>
<updated>2014-11-25T14:11:16+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T03:56:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=effcf067df5f986b8f9a2ca5101c74495be700ab'/>
<id>effcf067df5f986b8f9a2ca5101c74495be700ab</id>
<content type='text'>
Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: ivybridge: Add SATA init</title>
<updated>2014-11-25T13:34:01+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T01:18:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0'/>
<id>3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0</id>
<content type='text'>
Add code to set up the SATA interfaces on boot.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add code to set up the SATA interfaces on boot.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: ivybridge: Add additional LPC init</title>
<updated>2014-11-25T13:34:01+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T01:18:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=72cd085aaed511abf1ece0b406b79b90d26826af'/>
<id>72cd085aaed511abf1ece0b406b79b90d26826af</id>
<content type='text'>
Set up all the remaining pieces of the LPC (low-pin-count) peripheral in
PCH (Peripheral Controller Hub).

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Set up all the remaining pieces of the LPC (low-pin-count) peripheral in
PCH (Peripheral Controller Hub).

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: ivybridge: Add early LPC init so that serial works</title>
<updated>2014-11-21T06:34:12+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-13T05:42:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2b6051541b562b72d2cf784376a84552da18318d'/>
<id>2b6051541b562b72d2cf784376a84552da18318d</id>
<content type='text'>
The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device
which provides a serial port. This is accessible on Chromebooks, so enable
it early in the boot process.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device
which provides a serial port. This is accessible on Chromebooks, so enable
it early in the boot process.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: spi: Add soft_spi implementation</title>
<updated>2014-10-22T16:36:48+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-14T05:42:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=623b638607aa00dad85cee36e229011c79b249ce'/>
<id>623b638607aa00dad85cee36e229011c79b249ce</id>
<content type='text'>
Add a new implementation of soft_spi that uses device tree to specify the
GPIOs. This will replace soft_spi_legacy for boards which use driver model.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a new implementation of soft_spi that uses device tree to specify the
GPIOs. This will replace soft_spi_legacy for boards which use driver model.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sandbox: dts: Add a SPI device and cros_ec device</title>
<updated>2014-10-22T16:36:45+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-14T05:41:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0b304a2494eed170562a9fdd64e31332ad5ae73a'/>
<id>0b304a2494eed170562a9fdd64e31332ad5ae73a</id>
<content type='text'>
Add a SPI device which can be used for testing SPI flash features in
sandbox.

Also add a cros_ec device since with driver model the Chrome OS EC
emulation will not otherwise be available.

Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a SPI device which can be used for testing SPI flash features in
sandbox.

Also add a cros_ec device since with driver model the Chrome OS EC
emulation will not otherwise be available.

Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-dm</title>
<updated>2014-09-13T20:32:52+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-09-13T20:32:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8d028d404fa117a4b1f425d7cfc8affe1d8df6d5'/>
<id>8d028d404fa117a4b1f425d7cfc8affe1d8df6d5</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: serial: Add driver model support for ns16550</title>
<updated>2014-09-10T19:00:01+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-09-04T22:27:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=12e431b2777ce3b6940d7b7f1e32e28f58277560'/>
<id>12e431b2777ce3b6940d7b7f1e32e28f58277560</id>
<content type='text'>
Add driver model support so that ns16550 can support operation both with
and without driver model.

The driver needs a clock frequency so cannot stand alone unfortunately. The
clock frequency must be provided by a separate driver.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add driver model support so that ns16550 can support operation both with
and without driver model.

The driver needs a clock frequency so cannot stand alone unfortunately. The
clock frequency must be provided by a separate driver.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sandbox: dts: Add a serial console node</title>
<updated>2014-09-10T19:00:00+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-09-04T22:27:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2a9ae6e02f190e8c83450aab9099a9fb5ec48cc9'/>
<id>2a9ae6e02f190e8c83450aab9099a9fb5ec48cc9</id>
<content type='text'>
If the sandbox device tree is provided to U-Boot (with the -d flag) then it
will use the device tree version in preference to the built-in device. The
only difference is the colour.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If the sandbox device tree is provided to U-Boot (with the -d flag) then it
will use the device tree version in preference to the built-in device. The
only difference is the colour.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
