<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/doc/device-tree-bindings, branch v2015.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/doc/device-tree-bindings?h=v2015.04-rc2</id>
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<updated>2015-02-13T08:17:10Z</updated>
<entry>
<title>samsung: board: support eMMC reset using DT</title>
<updated>2015-02-13T08:17:10Z</updated>
<author>
<name>Joonyoung Shim</name>
<email>jy0922.shim@samsung.com</email>
</author>
<published>2015-01-15T02:45:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aa8e00fab5e65a07c2cae52274946a908805ea60'/>
<id>urn:sha1:aa8e00fab5e65a07c2cae52274946a908805ea60</id>
<content type='text'>
Some exynos boards require special handling of nRESET_OUT line for eMMC
memory to perform complete reboot e.g. Odroid X2/U3/XU3 boards.

This will support eMMC reset using DT from reset_misc of samsung common
board file.

Signed-off-by: Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>dm: i2c: dts: Support an offset-len device tree property</title>
<updated>2015-01-30T00:10:01Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-27T03:29:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7132b9fd68a1c76bf557d56dd62756a6607cf761'/>
<id>urn:sha1:7132b9fd68a1c76bf557d56dd62756a6607cf761</id>
<content type='text'>
Since U-Boot can support different offset lengths (0-4 bytes), add a device
tree property to specify this. This avoids hard-coding it in the driver.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: tegra: Bring in GPIO device tree binding</title>
<updated>2015-01-30T00:09:50Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-06T03:05:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5cfc662c496a0e52301a9379f91755b1f8fbf368'/>
<id>urn:sha1:5cfc662c496a0e52301a9379f91755b1f8fbf368</id>
<content type='text'>
At present the tegra GPIO driver does not fully support the existing device
tree binding, but add the binding file to cover the existing partial support.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: exynos: Bring in GPIO device tree binding</title>
<updated>2015-01-30T00:09:50Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-06T03:05:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=35ea1bfde30a541188ffd24cdf9b3ba79b0e4684'/>
<id>urn:sha1:35ea1bfde30a541188ffd24cdf9b3ba79b0e4684</id>
<content type='text'>
At present the exynos GPIO driver does not fully support the existing device
tree binding, but add the binding file to cover the existing partial support.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: gpio: Bring in GPIO device tree binding</title>
<updated>2015-01-30T00:09:50Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-06T03:05:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9f4cd0200cae9821f9ae7994b86ec7a2023bbcd0'/>
<id>urn:sha1:9f4cd0200cae9821f9ae7994b86ec7a2023bbcd0</id>
<content type='text'>
Add the binding file that we are about to support.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>cros-ec-keyboard: Synchronize DT binding from linux</title>
<updated>2015-01-06T00:45:16Z</updated>
<author>
<name>Sjoerd Simons</name>
<email>sjoerd.simons@collabora.co.uk</email>
</author>
<published>2014-11-27T15:34:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9332274989009b213a405134202088e1bd81fe51'/>
<id>urn:sha1:9332274989009b213a405134202088e1bd81fe51</id>
<content type='text'>
The ChromeOS EC keyboard is used by various different chromebooks. Peach
pi being the third board in the u-boot tree to use it (snow and peach
pit the other two). Rather then embedding the same big DT node in the
peach-pi DT again, copy the dtsi snippit &amp; bindings documentation from
linux and include it in all 3 boards.

This slightly changes the dt bindings in u-boot:
  * google,key-rows becomes keypad,num-rows
  * google,key-colums becomes keypad,num-colums
  * google,repeat-delay-ms and google,repeat-rate-ms are no longer used
    and replaced by hardcoded values (similar to tegra kbc)

Signed-off-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add initial video device init for Intel GMA</title>
<updated>2014-11-25T14:11:16Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T03:56:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=effcf067df5f986b8f9a2ca5101c74495be700ab'/>
<id>urn:sha1:effcf067df5f986b8f9a2ca5101c74495be700ab</id>
<content type='text'>
Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: ivybridge: Add SATA init</title>
<updated>2014-11-25T13:34:01Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T01:18:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0'/>
<id>urn:sha1:3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0</id>
<content type='text'>
Add code to set up the SATA interfaces on boot.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: ivybridge: Add additional LPC init</title>
<updated>2014-11-25T13:34:01Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T01:18:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=72cd085aaed511abf1ece0b406b79b90d26826af'/>
<id>urn:sha1:72cd085aaed511abf1ece0b406b79b90d26826af</id>
<content type='text'>
Set up all the remaining pieces of the LPC (low-pin-count) peripheral in
PCH (Peripheral Controller Hub).

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: ivybridge: Add early LPC init so that serial works</title>
<updated>2014-11-21T06:34:12Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-13T05:42:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2b6051541b562b72d2cf784376a84552da18318d'/>
<id>urn:sha1:2b6051541b562b72d2cf784376a84552da18318d</id>
<content type='text'>
The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device
which provides a serial port. This is accessible on Chromebooks, so enable
it early in the boot process.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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