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<title>u-boot.git/doc/device-tree-bindings, branch v2016.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>drivers: serial: add driver for Microchip PIC32 UART controller.</title>
<updated>2016-02-01T21:14:00+00:00</updated>
<author>
<name>Paul Thacker</name>
<email>paul.thacker@microchip.com</email>
</author>
<published>2016-01-28T10:00:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e160ee823b44e0a63bc469d42d7d9fcab54b60b'/>
<id>9e160ee823b44e0a63bc469d42d7d9fcab54b60b</id>
<content type='text'>
This adds PIC32 UART controller support based on driver model.

Signed-off-by: Paul Thacker &lt;paul.thacker@microchip.com&gt;
Signed-off-by: Purna Chandra Mandal &lt;purna.mandal@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This adds PIC32 UART controller support based on driver model.

Signed-off-by: Paul Thacker &lt;paul.thacker@microchip.com&gt;
Signed-off-by: Purna Chandra Mandal &lt;purna.mandal@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.</title>
<updated>2016-02-01T21:14:00+00:00</updated>
<author>
<name>Purna Chandra Mandal</name>
<email>purna.mandal@microchip.com</email>
</author>
<published>2016-01-28T10:00:11+00:00</published>
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<id>a0e7908326b9dcde4c27dbbcbc52ccbf9e009255</id>
<content type='text'>
PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers
and dividers capable of supplying clock to various controllers
on or off-chip.

Signed-off-by: Purna Chandra Mandal &lt;purna.mandal@microchip.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
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<pre>
PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers
and dividers capable of supplying clock to various controllers
on or off-chip.

Signed-off-by: Purna Chandra Mandal &lt;purna.mandal@microchip.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-net</title>
<updated>2016-01-28T23:42:10+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-01-28T23:42:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=82d72a1b9967cff4908f22c57536c3660f794401'/>
<id>82d72a1b9967cff4908f22c57536c3660f794401</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>net: phy: micrel: add documentation for Micrel KSZ90x1 binding</title>
<updated>2016-01-28T19:20:29+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@opensource.altera.com</email>
</author>
<published>2016-01-27T21:45:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c16e69f702b171473d46825db7e663fd27d141b4'/>
<id>c16e69f702b171473d46825db7e663fd27d141b4</id>
<content type='text'>
Add the DTS documentation for the Micrel KSZ90x1 binding.

The original document was from:
[commit 4b405efbe12de28b26289282b431323d73992381 from the Linux kernel]

This takes the original document and adds a clarification on how the skew
values are represented in the code.

References:

Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014.
http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf

Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014.
http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf

Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Add the DTS documentation for the Micrel KSZ90x1 binding.

The original document was from:
[commit 4b405efbe12de28b26289282b431323d73992381 from the Linux kernel]

This takes the original document and adds a clarification on how the skew
values are represented in the code.

References:

Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014.
http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf

Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014.
http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf

Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: tsec: Use priv-&gt;tbiaddr to initialize TBI PHY address</title>
<updated>2016-01-28T18:23:19+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-01-12T06:41:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a1c76c150831168c09810006ede95b164fa292df'/>
<id>a1c76c150831168c09810006ede95b164fa292df</id>
<content type='text'>
Add a new member 'tbiaddr' to tsec_private struct. For non-DM driver,
it is initialized as CONFIG_SYS_TBIPA_VALUE, but for DM driver, we
can get this from device tree. Update the bindings doc as well.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Add a new member 'tbiaddr' to tsec_private struct. For non-DM driver,
it is initialized as CONFIG_SYS_TBIPA_VALUE, but for DM driver, we
can get this from device tree. Update the bindings doc as well.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>doc: dt-bindings: Describe Freescale TSEC ethernet controller</title>
<updated>2016-01-28T18:23:10+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-01-12T06:41:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=69a00875e3db178cfcb19ea8ab97c8927a11e593'/>
<id>69a00875e3db178cfcb19ea8ab97c8927a11e593</id>
<content type='text'>
Adapted from the same file name in the kernel device tree bindings
documentation, to use with U-Boot.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
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<pre>
Adapted from the same file name in the kernel device tree bindings
documentation, to use with U-Boot.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-x86</title>
<updated>2016-01-28T15:07:22+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-01-28T15:07:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4b5a4a0535e280279e8cab93ba6d4aad53896bda'/>
<id>4b5a4a0535e280279e8cab93ba6d4aad53896bda</id>
<content type='text'>
</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>x86: baytrail: Add documentation for FSP memory-down values</title>
<updated>2016-01-28T05:53:29+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-01-18T10:55:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9b5dbe135887cf0853c175780f5b16b3fd0974a4'/>
<id>9b5dbe135887cf0853c175780f5b16b3fd0974a4</id>
<content type='text'>
This patch adds the documentation for the memory-down parameters
of the Intel FSP. To configure a board without SPD DDR DIMM but
with onboard DDR chips. The values are taken from the coreboot
header:

	src/soc/intel/fsp_baytrail/chip.h

(git ID da1a70ea from 2016-01-16 as reference).

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Andrew Bradford &lt;andrew.bradford@kodakalaris.com&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
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<pre>
This patch adds the documentation for the memory-down parameters
of the Intel FSP. To configure a board without SPD DDR DIMM but
with onboard DDR chips. The values are taken from the coreboot
header:

	src/soc/intel/fsp_baytrail/chip.h

(git ID da1a70ea from 2016-01-16 as reference).

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Andrew Bradford &lt;andrew.bradford@kodakalaris.com&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: uartlite: Move driver to DM</title>
<updated>2016-01-27T14:55:49+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2015-12-01T13:24:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=93768393d71871e4638d613acfdad6ef3cf62561'/>
<id>93768393d71871e4638d613acfdad6ef3cf62561</id>
<content type='text'>
Enable SPL DM too.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
</content>
<content type='xhtml'>
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<pre>
Enable SPL DM too.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ns16550: replace with binding files from Linux kernel</title>
<updated>2016-01-25T15:40:03+00:00</updated>
<author>
<name>Thomas Chou</name>
<email>thomas@wytron.com.tw</email>
</author>
<published>2015-12-14T12:45:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=75219d57efc6bbbfcefa8af77a276d97ecea9720'/>
<id>75219d57efc6bbbfcefa8af77a276d97ecea9720</id>
<content type='text'>
Replace ns16550.txt with binding files from Linux kernel. As suggested
by Stephen Warren, we should keep the directory structure, filenames,
and file content identical to the bindings in the Linux kernel.

Signed-off-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Replace ns16550.txt with binding files from Linux kernel. As suggested
by Stephen Warren, we should keep the directory structure, filenames,
and file content identical to the bindings in the Linux kernel.

Signed-off-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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