u-boot.git/doc/device-tree-bindings, branch v2016.07-rc1

gpio: add Tegra186 GPIO driver

2016-05-31T16:54:24Z

Tegra186's GPIO controller register layout is significantly different from previous chips, so add a new driver for it. In fact, there are two different GPIO controllers in Tegra186 that share a similar register layout, but very different port mapping. This driver covers both. The DT binding is already present in the Linux kernel (in linux-next via the Tegra tree so far). Signed-off-by: Stephen Warren Reviewed-by: Simon Glass # v1 Signed-off-by: Tom Warren

Add a mailbox driver framework/uclass

2016-05-27T02:48:31Z

A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some other device such as an auxilliary CPU running firmware or a hardware module. This patch defines a standard API that connects mailbox clients to mailbox providers (drivers). Initially, DT is the only supported method for connecting the two. The DT binding specification (mailbox.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt. Signed-off-by: Stephen Warren Acked-by: Simon Glass

Merge branch 'master' of git://git.denx.de/u-boot-net

2016-05-24T15:59:02Z

Signed-off-by: Tom Rini Conflicts: drivers/net/zynq_gem.c

net: phy: dp83867: Add device tree bindings and documentation

2016-05-24T16:42:04Z

Add the device tree bindings and the accompanying documentation for the TI DP83867 Giga bit ethernet phy driver. The original document was from: [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel] Signed-off-by: Dan Murphy Reviewed-by: Mugunthan V N Tested-by: Mugunthan V N Acked-by: Joe Hershberger

Merge branch 'master' of git://git.denx.de/u-boot-x86

2016-05-23T22:32:47Z

x86: irq: Enable SCI on IRQ9

2016-05-23T07:18:00Z

By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to use IRQ9. Signed-off-by: Bin Meng Reviewed-by: Stefan Roese Tested-by: Stefan Roese

drivers: spi: add spi support for QCA/Atheros ath79 SOCs

2016-05-20T23:25:50Z

This patch add a compatible spi driver for ath79 series SOC. Signed-off-by: Wills Wang Reviewed-by: Thomas Chou Reviewed-by: Daniel Schwierzeck

drivers: serial: add serial driver for ar933x SOC

2016-05-20T23:25:50Z

This patch add support for ar933x serial. Signed-off-by: Wills Wang Reviewed-by: Thomas Chou Reviewed-by: Daniel Schwierzeck Reviewed-by: Simon Glass

i2c: Describe Cadence I2C devicetree bindings

2016-04-13T16:29:07Z

Signed-off-by: Moritz Fischer Reviewed-by: Heiko Schocher Signed-off-by: Michal Simek

armv8: LS2080A: Consolidate LS2080A and LS2085A

2016-04-06T17:26:46Z

LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun CC: Prabhakar Kushwaha Reviewed-by: Prabhakar Kushwaha