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<title>u-boot.git/doc/device-tree-bindings, branch v2020.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/doc/device-tree-bindings?h=v2020.01-rc2</id>
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<updated>2019-11-10T12:31:09Z</updated>
<entry>
<title>dm: regulator: support regulator more state</title>
<updated>2019-11-10T12:31:09Z</updated>
<author>
<name>Joseph Chen</name>
<email>chenjh@rock-chips.com</email>
</author>
<published>2019-09-26T07:43:52Z</published>
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<id>urn:sha1:11406b8f7e24385ae8ee4065c5a193f2449fc08a</id>
<content type='text'>
support parse regulator standard property:
regulator-off-in-suspend;
regulator-init-microvolt;
regulator-suspend-microvolt:
 regulator_get_suspend_enable
 regulator_set_suspend_enable
 regulator_get_suspend_value
 regulator_set_suspend_value

Signed-off-by: Joseph Chen &lt;chenjh@rock-chips.com&gt;
Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: memory-controller: Introduce J721E DDRSS bindings</title>
<updated>2019-10-25T21:33:21Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2019-10-07T13:56:35Z</published>
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<id>urn:sha1:ffb6b8e540f9badfeba188663c96aa4980f41612</id>
<content type='text'>
Add DT binding documentation for DDR sub system present on J721E device.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
</entry>
<entry>
<title>Merge branch '2019-10-11-master-imports'</title>
<updated>2019-10-12T14:10:59Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-10-12T14:10:59Z</published>
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<id>urn:sha1:0c9cc5155cb5027ae17ace986f349e2f0d1fb9a3</id>
<content type='text'>
- Assorted cleanups
- FAT bugfixes
- mediatek platform updates
</content>
</entry>
<entry>
<title>clk: cdce9xx: add support for cdce9xx clock synthesizer</title>
<updated>2019-10-11T17:32:39Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2019-09-27T16:14:26Z</published>
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<id>urn:sha1:260777fc2333183728d24fb0ffaa22a888c09655</id>
<content type='text'>
Add support for CDCE913/925/937/949 family of devices. These are modular
PLL-based low cost, high performance, programmable clock synthesizers,
multipliers and dividers. They generate up to 9 output clocks from a
single input frequency. The initial version of the driver does not
support programming of the PLLs, and thus they run in the bypass mode
only. The code is loosely based on the linux kernel cdce9xx driver.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: phy: add a document for MediaTek tphy</title>
<updated>2019-10-11T14:10:18Z</updated>
<author>
<name>Ryder Lee</name>
<email>ryder.lee@mediatek.com</email>
</author>
<published>2019-08-22T10:26:54Z</published>
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<id>urn:sha1:4024006e528b2f062024796c15293a820409c232</id>
<content type='text'>
This adds a document for tphy which supports physical layer
functionality for a number of controllers on MediaTek SoCs,
such as, USB2.0, USB3.0, PCIe, and SATA.

Signed-off-by: Ryder Lee &lt;ryder.lee@mediatek.com&gt;
Signed-off-by: Frank Wunderlich &lt;frank-w@public-files.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pcie: add a document for MT7623 PCIe controller</title>
<updated>2019-10-11T14:10:18Z</updated>
<author>
<name>Ryder Lee</name>
<email>ryder.lee@mediatek.com</email>
</author>
<published>2019-08-22T10:26:53Z</published>
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<id>urn:sha1:825c47ee9d49a39687a3351dced45bbc10fee2f4</id>
<content type='text'>
This adds a document for MT7623 PCIe controller.

Signed-off-by: Ryder Lee &lt;ryder.lee@mediatek.com&gt;
Signed-off-by: Frank Wunderlich &lt;frank-w@public-files.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: remoteproc: Add bindings for DSP C66x clusters on TI K3 SoCs</title>
<updated>2019-10-11T14:07:34Z</updated>
<author>
<name>Suman Anna</name>
<email>s-anna@ti.com</email>
</author>
<published>2019-09-04T10:31:35Z</published>
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<id>urn:sha1:e18fb7dd5c00d2830f4c6acca2451032fe1b4870</id>
<content type='text'>
Some Texas Instruments K3 family of SoCs have one of more Digital Signal
Processor (DSP) subsystems that are comprised of either a TMS320C66x
CorePac and/or a next-generation TMS320C71x CorePac processor subsystem.
Add the device tree bindings document for the C66x DSP devices on these
SoCs. The added example illustrates the DT nodes for the first C66x DSP
device present on the K3 J721E family of SoCs.

Signed-off-by: Suman Anna &lt;s-anna@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs</title>
<updated>2019-10-11T14:07:34Z</updated>
<author>
<name>Suman Anna</name>
<email>s-anna@ti.com</email>
</author>
<published>2019-09-04T10:31:33Z</published>
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<id>urn:sha1:471c2d5e22398d356ad653cfbc1303f01c0edbed</id>
<content type='text'>
The Texas Instruments K3 family of SoCs have one of more dual-core
Arm Cortex R5F processor subsystems/clusters (R5FSS). Add the device
tree bindings document for these R5F subsystem devices. These R5F
processors do not have an MMU, and so require fixed memory carveout
regions matching the firmware image addresses. The nodes require more
than one memory region, with the first memory region used for DMA
allocations at runtime. The remaining memory regions are reserved
and are used for the loading and running of the R5F remote processors.

The added example illustrates the DT nodes for the single R5FSS device
present on K3 AM65x family of SoCs.

Signed-off-by: Suman Anna &lt;s-anna@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
</entry>
<entry>
<title>drivers: net: add marvell MDIO driver</title>
<updated>2019-09-04T16:37:19Z</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2019-07-25T09:33:19Z</published>
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<id>urn:sha1:8bd37ce3cd7bd49a22156765c93ae5f23c480060</id>
<content type='text'>
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
  *) The MDIO interface is shared by all Ethernet ports, so a driver
     must guarantee non-concurrent accesses to this MDIO interface. The
     most logical way is to have a separate driver that handles this
     single MDIO interface, used by all Ethernet ports.
  *) The MDIO interface is the same between the existing mv643xx_eth
     driver and the new mvneta/mvpp2 driver. Even though it is for now
     only used by the mvneta/mvpp2 driver, it will in the future be
     used by the mv643xx_eth driver as well.

This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
802.3 Clause 45.

This patch also adds device tree binding for marvell MDIO driver.

Signed-off-by: Ken Ma &lt;make@marvell.com&gt;
Signed-off-by: Alex Marginean &lt;alexm.osslist@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>doc: bindings: add mdio.txt describing generic MDIO properties</title>
<updated>2019-09-04T16:37:19Z</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2019-07-25T09:33:18Z</published>
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<id>urn:sha1:01c9f047ac104f442cd5d78ee55ee6e02a8110cc</id>
<content type='text'>
Adds a binding document for mdio.  A notable deviation from corresponding
Linux binding is the introduction of device-name optional property, which
can be used to name MDIO buses.  Two reset optional properties described
by Linux binding are also not present as they don't seem to be used in
U-Boot at this time.

Signed-off-by: Alex Marginean &lt;alexm.osslist@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Signed-off-by: Alex Marginean &lt;alexm.osslist@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
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