<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/doc/device-tree-bindings, branch v2021.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/doc/device-tree-bindings?h=v2021.01-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/doc/device-tree-bindings?h=v2021.01-rc2'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2020-11-06T02:18:20Z</updated>
<entry>
<title>smbios: Add documentation and devicetree binding</title>
<updated>2020-11-06T02:18:20Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-11-05T13:32:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f96965315489fcb7fc9df8fe4da0137150bb3826'/>
<id>urn:sha1:f96965315489fcb7fc9df8fe4da0137150bb3826</id>
<content type='text'>
Add information about how to set SMBIOS properties using the devicetree.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>doc: Add a binding for sysinfo</title>
<updated>2020-11-06T02:18:20Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-11-05T13:32:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=49337238effdd86e5863b14a52c1ecc08867bb01'/>
<id>urn:sha1:49337238effdd86e5863b14a52c1ecc08867bb01</id>
<content type='text'>
Add a simple binding file for this, so that it is clear what this binding
directory is for.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>board: Rename uclass to sysinfo</title>
<updated>2020-11-06T02:18:20Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-11-05T13:32:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3a8ee3df836614b68881f5b84d3197305ee1b08e'/>
<id>urn:sha1:3a8ee3df836614b68881f5b84d3197305ee1b08e</id>
<content type='text'>
This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.

In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.

The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.

Rename everything accordingly.

Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>spi: Add Qualcomm QUP SPI controller driver</title>
<updated>2020-10-22T13:54:54Z</updated>
<author>
<name>Robert Marko</name>
<email>robert.marko@sartura.hr</email>
</author>
<published>2020-10-08T20:05:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=367ea426a51886f6815e520f8b75a010cfa1bdfb'/>
<id>urn:sha1:367ea426a51886f6815e520f8b75a010cfa1bdfb</id>
<content type='text'>
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s.

Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW.
FIFO and Block modes are supported, no support for DMA mode is planned.

Signed-off-by: Robert Marko &lt;robert.marko@sartura.hr&gt;
Signed-off-by: Luka Kovacic &lt;luka.kovacic@sartura.hr&gt;
Cc: Luka Perkov &lt;luka.perkov@sartura.hr&gt;
</content>
</entry>
<entry>
<title>dt-bindings: usb: mtu3: add bindings for MediaTek USB3 DRD</title>
<updated>2020-10-19T22:49:05Z</updated>
<author>
<name>Chunfeng Yun</name>
<email>chunfeng.yun@mediatek.com</email>
</author>
<published>2020-10-14T07:08:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=78fe97b96eef0dc2c4bf16adb427242611e1f813'/>
<id>urn:sha1:78fe97b96eef0dc2c4bf16adb427242611e1f813</id>
<content type='text'>
Add dt-binding for MediaTek USB3 DRD Driver which it's ported
from the Linux kernel DTS binding:
Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
Commit ID:
34d0545978b6 ("dt-bindings: usb: mtu3: fix typo of DMA clock name")

Due to Dual-Role switch is not supported in Uboot, some properties
are removed or changed.

Signed-off-by: Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-binding: usb: add bindings for some common properties</title>
<updated>2020-10-19T22:49:05Z</updated>
<author>
<name>Chunfeng Yun</name>
<email>chunfeng.yun@mediatek.com</email>
</author>
<published>2020-10-14T07:08:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8faef3c756efb9ce924dce968ffddb0416208036'/>
<id>urn:sha1:8faef3c756efb9ce924dce968ffddb0416208036</id>
<content type='text'>
Add bindings for common properties, include maximum-speed,
dr_mode and phy_type

Signed-off-by: Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: Add support for Kendryte K210 FPIOA</title>
<updated>2020-10-08T15:42:36Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-09-14T15:01:58Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7224d5ccf8e1d2552e2994c5d55769c334231c08'/>
<id>urn:sha1:7224d5ccf8e1d2552e2994c5d55769c334231c08</id>
<content type='text'>
The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
largely unimplemented (in favor of the dedicated GPIO peripherals).

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: Add pinmux property support to pinctrl-generic</title>
<updated>2020-10-08T15:42:36Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-09-14T15:01:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9c08fbfc951fa90953b75462e5dff533c0031a4d'/>
<id>urn:sha1:9c08fbfc951fa90953b75462e5dff533c0031a4d</id>
<content type='text'>
The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing pinmux groups. A pinmux group consists of the pin identifier
and mux settings represented as a single integer or an array of integers.
Each individual pin controller driver specifies the exact format of a
pinmux group. As specified in the Linux documentation, a pinmux group may
be multiple integers long. However, no existing drivers use multi-integer
pinmux groups, so I have chosen to omit this feature. This makes the
implementation easier, since there is no need to allocate a buffer to do
endian conversions.

Support for the pinmux property is done differently than in Linux.  As far
as I can tell, inversion of control is used when implementing support for
the pins and groups properties to avoid allocating. This results in some
duplication of effort; every property in a config node is parsed once for
each pin in that node. This is not such an overhead with pins and groups
properties, since having multiple pins in one config node does not occur
especially often. However, the semantics of the pinmux property make such a
configuration much more appealing. A future patch could parse all config
properties at once and store them in an array. This would make it easier to
create drivers which do not function solely as callbacks from
pinctrl-generic.

This commit increases the size of the sandbox build by approximately 48
bytes.  However, it also decreases the size of the K210 device tree by 2
KiB from the previous version of this series.

The documentation has been updated from the last Linux commit before it was
split off into yaml files.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: arm: SCMI bindings documentation</title>
<updated>2020-09-30T15:55:23Z</updated>
<author>
<name>Etienne Carriere</name>
<email>etienne.carriere@linaro.org</email>
</author>
<published>2020-09-09T16:44:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4e5ce7ecd3ed734245b00a4068d6c86009e8b7ab'/>
<id>urn:sha1:4e5ce7ecd3ed734245b00a4068d6c86009e8b7ab</id>
<content type='text'>
Dump SCMI DT bindings documentation from Linux kernel source
tree v5.8-rc1.

Signed-off-by: Etienne Carriere &lt;etienne.carriere@linaro.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add a way to add to the e820 memory table</title>
<updated>2020-09-25T03:27:25Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-09-22T18:45:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=70c202c480b8dadd27dbfb723f0cede1fb0e0d0c'/>
<id>urn:sha1:70c202c480b8dadd27dbfb723f0cede1fb0e0d0c</id>
<content type='text'>
Some boards want to reserve extra regions of memory. Add a 'chosen'
property to support this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
</feed>
