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<title>u-boot.git/doc/device-tree-bindings, branch v2022.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>k210: use the board vendor name rather than the marketing name</title>
<updated>2022-03-15T09:43:11+00:00</updated>
<author>
<name>Damien Le Moal</name>
<email>damien.lemoal@opensource.wdc.com</email>
</author>
<published>2022-03-01T10:35:39+00:00</published>
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<id>fd426b31066ba61ee1ff96a2b56c919251ffdd9e</id>
<content type='text'>
"kendryte" is the marketing name for the K210 RISC-V SoC produced by
Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210"
vendor,SoC compatibility string format in the device tree files and
use the SoC name for file names.
With these changes, the device tree files are more in sync with the
Linux kernel DTS and drivers, making uboot device tree usable by the
kernel.

Signed-off-by: Damien Le Moal &lt;damien.lemoal@opensource.wdc.com&gt;
Signed-off-by: Niklas Cassel &lt;niklas.cassel@wdc.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
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<pre>
"kendryte" is the marketing name for the K210 RISC-V SoC produced by
Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210"
vendor,SoC compatibility string format in the device tree files and
use the SoC name for file names.
With these changes, the device tree files are more in sync with the
Linux kernel DTS and drivers, making uboot device tree usable by the
kernel.

Signed-off-by: Damien Le Moal &lt;damien.lemoal@opensource.wdc.com&gt;
Signed-off-by: Niklas Cassel &lt;niklas.cassel@wdc.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>remoteproc: k3_system_controller: Support optional boot_notification channel</title>
<updated>2022-02-08T14:41:26+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2022-01-25T15:26:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=473bd5aee1308d43a3ad9baee9dd8ec1fb6b4a2d'/>
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<content type='text'>
If there is an optional boot notification channel that an SoC uses
separate from the rx path, use the same.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
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<pre>
If there is an optional boot notification channel that an SoC uses
separate from the rx path, use the same.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>stm32mp1: ram: remove the support of calibration result</title>
<updated>2021-11-30T15:43:28+00:00</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2021-11-15T14:32:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9819fe345cc9de8ab1ca8c53999b5d460a8d0e7d'/>
<id>9819fe345cc9de8ab1ca8c53999b5d460a8d0e7d</id>
<content type='text'>
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional parameter "st,phy-cal"

After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
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<pre>
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional parameter "st,phy-cal"

After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sandbox: mmc: Support a backing file</title>
<updated>2021-11-28T23:51:51+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-10-23T23:25:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0bf61aced283a4ec256f1d8fe919e8890da2191c'/>
<id>0bf61aced283a4ec256f1d8fe919e8890da2191c</id>
<content type='text'>
Provide a way for sandbox MMC to present data from a backing file. This
allows a filesystem to be created on the host and easily served via an
emulated mmc device.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Provide a way for sandbox MMC to present data from a backing file. This
allows a filesystem to be created on the host and easily served via an
emulated mmc device.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: arm: scmi: OP-TEE as transport channel for SCMI messages</title>
<updated>2021-11-23T18:53:03+00:00</updated>
<author>
<name>Etienne Carriere</name>
<email>etienne.carriere@linaro.org</email>
</author>
<published>2021-11-09T16:08:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fcb41d4db287129aaac3135881b669ad64e12a69'/>
<id>fcb41d4db287129aaac3135881b669ad64e12a69</id>
<content type='text'>
Introduce compatible "linaro,scmi-optee" for SCMI transport channel
based on an OP-TEE service invocation.

Define "linaro,optee-channel-id" property to identify the OP-TEE SCMI
channel used by the protocol(s). OP-TEE SCMI transport can either use
shared memory or a static shared memory buffer identified by the DT.

These bindings were posted to the Linux kernel DT bindings mailing list
and acked by maintainer [1].

Link: [1] https://lore.kernel.org/linux-arm-kernel/20211029102118.GG6526@e120937-lin/T/
Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Reviewed-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Signed-off-by: Etienne Carriere &lt;etienne.carriere@linaro.org&gt;
</content>
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<pre>
Introduce compatible "linaro,scmi-optee" for SCMI transport channel
based on an OP-TEE service invocation.

Define "linaro,optee-channel-id" property to identify the OP-TEE SCMI
channel used by the protocol(s). OP-TEE SCMI transport can either use
shared memory or a static shared memory buffer identified by the DT.

These bindings were posted to the Linux kernel DT bindings mailing list
and acked by maintainer [1].

Link: [1] https://lore.kernel.org/linux-arm-kernel/20211029102118.GG6526@e120937-lin/T/
Cc: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Reviewed-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Signed-off-by: Etienne Carriere &lt;etienne.carriere@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Add Apple pinctrl driver</title>
<updated>2021-11-17T22:04:58+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2021-11-02T17:21:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b814e0007e060b5cce314edcf5c0507a67cafd73'/>
<id>b814e0007e060b5cce314edcf5c0507a67cafd73</id>
<content type='text'>
This driver supports both pin muxing and GPIO support for the
pin control logic found on Apple SoCs.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</content>
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<pre>
This driver supports both pin muxing and GPIO support for the
pin control logic found on Apple SoCs.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: qcom: add support for GENI serial driver</title>
<updated>2021-10-31T12:46:44+00:00</updated>
<author>
<name>Dzmitry Sankouski</name>
<email>dsankouski@gmail.com</email>
</author>
<published>2021-10-17T10:44:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=324df15a292e938d9341df94e2192a4a465c714e'/>
<id>324df15a292e938d9341df94e2192a4a465c714e</id>
<content type='text'>
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.

Signed-off-by: Dzmitry Sankouski &lt;dsankouski@gmail.com&gt;
Cc: Ramon Fried &lt;rfried.dev@gmail.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.

Signed-off-by: Dzmitry Sankouski &lt;dsankouski@gmail.com&gt;
Cc: Ramon Fried &lt;rfried.dev@gmail.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu: Add IOMMU uclass</title>
<updated>2021-10-31T12:46:44+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2021-10-23T14:58:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=40dbf03d7d2dd2b5516f797069e3ea830db6fecc'/>
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<content type='text'>
This uclass is intended to manage IOMMUs on systems where the
IOMMUs are not in bypass mode by default.  In that case U-Boot
cannot ignore the IOMMUs if it wants to use devices that need
to do DMA and sit behind such an IOMMU.

This initial IOMMU uclass implementation does not implement and
device ops and is intended for IOMMUs that have a bypass mode
that does not require address translation.  Support for IOMMUs
that do require address translation is planned and device ops
will be defined when support for such IOMMUs will be added.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This uclass is intended to manage IOMMUs on systems where the
IOMMUs are not in bypass mode by default.  In that case U-Boot
cannot ignore the IOMMUs if it wants to use devices that need
to do DMA and sit behind such an IOMMU.

This initial IOMMU uclass implementation does not implement and
device ops and is intended for IOMMUs that have a bypass mode
that does not require address translation.  Support for IOMMUs
that do require address translation is planned and device ops
will be defined when support for such IOMMUs will be added.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/gpio: add support for MAX7320 i2c i/o expander</title>
<updated>2021-10-19T15:25:24+00:00</updated>
<author>
<name>Hannes Schmelzer</name>
<email>hannes.schmelzer@br-automation.com</email>
</author>
<published>2021-10-01T11:37:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bba76a17bd11b5700c2aeb4e7178ac8ac016849c'/>
<id>bba76a17bd11b5700c2aeb4e7178ac8ac016849c</id>
<content type='text'>
This commit adds support for the MAX7320 (and clones) gpio expander.

Signed-off-by: Hannes Schmelzer &lt;hannes.schmelzer@br-automation.com&gt;
</content>
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<pre>
This commit adds support for the MAX7320 (and clones) gpio expander.

Signed-off-by: Hannes Schmelzer &lt;hannes.schmelzer@br-automation.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: pwm: pwm-at91: Add PWM bindings for A5D2</title>
<updated>2021-10-12T12:18:39+00:00</updated>
<author>
<name>Dan Sneddon</name>
<email>dan.sneddon@microchip.com</email>
</author>
<published>2021-09-20T23:28:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2d2273fa1effea235669a36efbd7beddb8017f67'/>
<id>2d2273fa1effea235669a36efbd7beddb8017f67</id>
<content type='text'>
Document the bindings needed for the PWM device on the SAMA5D2.

Signed-off-by: Dan Sneddon &lt;dan.sneddon@microchip.com&gt;
</content>
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<pre>
Document the bindings needed for the PWM device on the SAMA5D2.

Signed-off-by: Dan Sneddon &lt;dan.sneddon@microchip.com&gt;
</pre>
</div>
</content>
</entry>
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