u-boot.git/doc/usage/semihosting.rst, branch master Unnamed repository; edit this file 'description' to name the repository. doc: RISC-V supports semihosting 2025-05-11T10:52:57+00:00 Heinrich Schuchardt heinrich.schuchardt@canonical.com 2025-05-09T06:42:07+00:00 5e5ddf79f1f54e8a32334003d5133777c909c34b Mention that RISC-V supports semihosting. Update the link to ARM's semihosting documentation Update SPDX identifier to current format. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> 
Mention that RISC-V supports semihosting.
Update the link to ARM's semihosting documentation

Update SPDX identifier to current format.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
global: Use proper project name U-Boot (next2) 2023-09-21T11:20:11+00:00 Michal Simek michal.simek@amd.com 2023-09-08T07:11:31+00:00 e6ff998cb02aad0326a8280498725a8e7bbbb37b Use proper project name in README, rst and comment. Done in connection to commit bb922ca3eb4b ("global: Use proper project name U-Boot (next)"). Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alexander Graf <graf@csgraf.de> (ppce500) Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/536af05e7061982f15b668e87f941cdabfa25392.1694157084.git.michal.simek@amd.com 
Use proper project name in README, rst and comment.
Done in connection to commit bb922ca3eb4b ("global: Use proper project name
U-Boot (next)").

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <graf@csgraf.de> (ppce500)
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/536af05e7061982f15b668e87f941cdabfa25392.1694157084.git.michal.simek@amd.com
ls1046ardb: Add support for JTAG boot 2022-04-01T20:56:44+00:00 Sean Anderson sean.anderson@seco.com 2022-03-22T21:16:05+00:00 93c3d329707e0d8dc98e5f86938bbedbe15b5349 This adds support for booting entirely from JTAG while using a hard-coded RCW. With these steps, it is not necessary to program a "good" RCW using CodeWarrior. The method here can be performed with any JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP (albeit very slowly). These steps require LS1046A support in OpenOCD, which was added in [1]. [1] https://sourceforge.net/p/openocd/code/ci/5b70c1f679755677c925b4e6dd2c3d8be4715717/ Signed-off-by: Sean Anderson <sean.anderson@seco.com> [trini: Add reference to doc/board/nxp/ls1046ardb.rst] 
This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).

These steps require LS1046A support in OpenOCD, which was added in [1].

[1] https://sourceforge.net/p/openocd/code/ci/5b70c1f679755677c925b4e6dd2c3d8be4715717/

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add reference to doc/board/nxp/ls1046ardb.rst]
doc: smh: Update semihosting documentation 2022-04-01T19:03:13+00:00 Sean Anderson sean.anderson@seco.com 2022-03-22T20:59:25+00:00 eeb54e81ca9226aa2a664af7d1e5bc2e44d790e3 This documents how to use semihosting, the new semihosting features, and how to migrate from smhload. Signed-off-by: Sean Anderson <sean.anderson@seco.com> 
This documents how to use semihosting, the new semihosting features, and
how to migrate from smhload.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
doc: Convert semihosting readme to rST 2022-04-01T19:03:13+00:00 Sean Anderson sean.anderson@seco.com 2022-03-22T20:59:09+00:00 d0ed9b10810f17c5b5cb2ee962c6d4df29a65a9c This converts the semihosting readme to rST. I have tried to make only cosmetic changes, but I did fix up the first link (which was broken). Signed-off-by: Sean Anderson <sean.anderson@seco.com> 
This converts the semihosting readme to rST. I have tried to make only
cosmetic changes, but I did fix up the first link (which was broken).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>