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<title>u-boot.git/doc, branch v2016.07-rc2</title>
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<entry>
<title>Merge git://git.denx.de/u-boot-nand-flash</title>
<updated>2016-06-20T09:15:52+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-06-20T09:15:52+00:00</published>
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<entry>
<title>mtd: nand: Patch remaining places where nand_to_mtd() should be used</title>
<updated>2016-06-20T00:28:38+00:00</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@free-electrons.com</email>
</author>
<published>2016-06-15T18:56:10+00:00</published>
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Some drivers are still directly accessing the chip-&gt;mtd field. Patch
them to use nand_to_mtd() instead.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
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Some drivers are still directly accessing the chip-&gt;mtd field. Patch
them to use nand_to_mtd() instead.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</pre>
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</entry>
<entry>
<title>nand: doc: fix example ecc scheme calculation</title>
<updated>2016-06-20T00:26:55+00:00</updated>
<author>
<name>Fabian Mewes</name>
<email>architekt@coding4coffee.org</email>
</author>
<published>2016-06-14T00:46:14+00:00</published>
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Signed-off-by: Fabian Mewes &lt;architekt@coding4coffee.org&gt;
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Signed-off-by: Fabian Mewes &lt;architekt@coding4coffee.org&gt;
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</entry>
<entry>
<title>nand: extend nand torture</title>
<updated>2016-06-20T00:25:12+00:00</updated>
<author>
<name>Max Krummenacher</name>
<email>max.oss.09@gmail.com</email>
</author>
<published>2016-06-13T08:15:48+00:00</published>
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nand torture currently works on exactly one nand block which is specified
by giving the byteoffset to the beginning of the block.

Extend this by allowing for a second parameter specifying the byte size
to be tested.

e.g.
==&gt; nand torture 1000000

NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000)
 Passed: 1, failed: 0

==&gt; nand torture 1000000 40000

NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000)
 Passed: 2, failed: 0

Signed-off-by: Max Krummenacher &lt;max.krummenacher@toradex.com&gt;
Reviewed-by: Benoît Thébaudeau &lt;benoit.thebaudeau.dev@gmail.com&gt;
[scottwood: fix usage to show size as optional, and add misssing braces]
Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
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<pre>
nand torture currently works on exactly one nand block which is specified
by giving the byteoffset to the beginning of the block.

Extend this by allowing for a second parameter specifying the byte size
to be tested.

e.g.
==&gt; nand torture 1000000

NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000)
 Passed: 1, failed: 0

==&gt; nand torture 1000000 40000

NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000)
 Passed: 2, failed: 0

Signed-off-by: Max Krummenacher &lt;max.krummenacher@toradex.com&gt;
Reviewed-by: Benoît Thébaudeau &lt;benoit.thebaudeau.dev@gmail.com&gt;
[scottwood: fix usage to show size as optional, and add misssing braces]
Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
</pre>
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</entry>
<entry>
<title>Add a reset driver framework/uclass</title>
<updated>2016-06-19T23:05:55+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-06-17T15:43:58+00:00</published>
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A reset controller is a hardware module that controls reset signals that
affect other hardware modules or chips.

This patch defines a standard API that connects reset clients (i.e. the
drivers for devices affected by reset signals) to drivers for reset
controllers/providers. Initially, DT is the only supported method for
connecting the two.

The DT binding specification (reset.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/reset/reset.txt.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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A reset controller is a hardware module that controls reset signals that
affect other hardware modules or chips.

This patch defines a standard API that connects reset clients (i.e. the
drivers for devices affected by reset signals) to drivers for reset
controllers/providers. Initially, DT is the only supported method for
connecting the two.

The DT binding specification (reset.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/reset/reset.txt.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</entry>
<entry>
<title>x86: Update x86-pinctrl driver device-tree-bindings doc</title>
<updated>2016-06-12T04:19:35+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-06-08T12:07:36+00:00</published>
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<id>2600ba6de07d80407308c632c7bfa3a538b36549</id>
<content type='text'>
This updates the device-tree-bindings doc for x86-pinctrl driver:

 - clarify "gpio-offset" is required only when "mode-gpio" is set
 - correct property name "pull-strength"
 - use tab instead of space at several places

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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This updates the device-tree-bindings doc for x86-pinctrl driver:

 - clarify "gpio-offset" is required only when "mode-gpio" is set
 - correct property name "pull-strength"
 - use tab instead of space at several places

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>doc, spl, am335x: update am335x-network</title>
<updated>2016-06-09T17:53:10+00:00</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2016-06-07T06:31:24+00:00</published>
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<content type='text'>
on the shc board we see when booting in net boot mode,
that the ROM bootloader sends "AM335x ROM" as
vendor-class-identifier. U-Boots doc says "DM814x ROM".

So, add the info to the doc, that there is also
"AM335x ROM" possible.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
on the shc board we see when booting in net boot mode,
that the ROM bootloader sends "AM335x ROM" as
vendor-class-identifier. U-Boots doc says "DM814x ROM".

So, add the info to the doc, that there is also
"AM335x ROM" possible.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-nand-flash</title>
<updated>2016-06-04T12:49:47+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-06-04T12:49:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=715b3a9b2486e8d7a32365d817c77209b35ee796'/>
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<pre>
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<entry>
<title>nand: Embed mtd_info in struct nand_chip</title>
<updated>2016-06-04T01:27:48+00:00</updated>
<author>
<name>Scott Wood</name>
<email>oss@buserror.net</email>
</author>
<published>2016-05-30T18:57:55+00:00</published>
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nand_info[] is now an array of pointers, with the actual mtd_info
instance embedded in struct nand_chip.

This is in preparation for syncing the NAND code with Linux 4.6,
which makes the same change to struct nand_chip.  It's in a separate
commit due to the large amount of changes required to accommodate the
change to nand_info[].

Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
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<pre>
nand_info[] is now an array of pointers, with the actual mtd_info
instance embedded in struct nand_chip.

This is in preparation for syncing the NAND code with Linux 4.6,
which makes the same change to struct nand_chip.  It's in a separate
commit due to the large amount of changes required to accommodate the
change to nand_info[].

Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
</pre>
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</content>
</entry>
<entry>
<title>gpio: add Tegra186 GPIO driver</title>
<updated>2016-05-31T16:54:24+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-05-25T20:38:51+00:00</published>
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<content type='text'>
Tegra186's GPIO controller register layout is significantly different from
previous chips, so add a new driver for it. In fact, there are two
different GPIO controllers in Tegra186 that share a similar register
layout, but very different port mapping. This driver covers both.

The DT binding is already present in the Linux kernel (in linux-next via
the Tegra tree so far).

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt; # v1
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
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Tegra186's GPIO controller register layout is significantly different from
previous chips, so add a new driver for it. In fact, there are two
different GPIO controllers in Tegra186 that share a similar register
layout, but very different port mapping. This driver covers both.

The DT binding is already present in the Linux kernel (in linux-next via
the Tegra tree so far).

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt; # v1
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
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