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<title>u-boot.git/drivers/ata, branch v2025.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ata?h=v2025.07</id>
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<updated>2025-04-22T21:13:21Z</updated>
<entry>
<title>Merge patch series "MIPS: Boston: Various enhancements"</title>
<updated>2025-04-22T21:13:21Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-22T21:13:21Z</published>
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<id>urn:sha1:20fcb6305eef553a94eeed6efb1a60ee3ccd9db7</id>
<content type='text'>
Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt; says:

This is a huge series which promoted MIPS/Boston target into a
usable state, with fixes to drivers and general framework issues
I found in this process.

I also converted the target to OF_UPSTREAM.

This target is covered by QEMU, to test on QEMU:
```
make boston64r6el_defconfig
make
qemu-system-mips64el -M boston -cpu I6500 -bios ./u-boot.bin -nographic
```

Link: https://lore.kernel.org/r/20240517-boston-v3-0-1ea7d23f4a1d@flygoat.com
</content>
</entry>
<entry>
<title>ahci: dwc_ahsata: Generalize the driver</title>
<updated>2025-04-22T21:08:47Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2024-05-17T18:14:53Z</published>
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<id>urn:sha1:2b62ec62ac39723660bfeb6c0b4d336269a3adfc</id>
<content type='text'>
Remove hard dependencies to arch headers, get clock from clk
subsystem if arch clock function is not available, align
compatible strings with devicetree binding.

No functional change on existing platforms, just get it build
on other platforms.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
</content>
</entry>
<entry>
<title>ahci: DMA addressing fixes</title>
<updated>2025-04-22T21:08:47Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2024-05-17T18:14:52Z</published>
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<id>urn:sha1:8daa1fadc2c45bc954537a70942674e0a4cf85a8</id>
<content type='text'>
Ensure that we are using correct physical/virtual address for
DMA buffer write and hardware register settings.

The convention is: in ahci_ioports all pointers are virtual,
that will be converted to physical address when writing to
hardware registers or into sg/cmd_tbl.

Also fixed 64bit physical address support for dwc_ahsata, ensure
higher bits are written into registers/sg properly.

Use memalign for allocating aligned buffer in dwc_ahsata so we
don't have to do our own alignment in driver.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Switch to using $(PHASE_) in Makefiles"</title>
<updated>2025-04-11T18:16:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-11T18:16:49Z</published>
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<id>urn:sha1:407d68638fe32418d61681407effba2a303bb9ee</id>
<content type='text'>
Tom Rini &lt;trini@konsulko.com&gt; says:

This series switches to always using $(PHASE_) in Makefiles when
building rather than $(PHASE_) or $(XPL_). It also starts on documenting
this part of the build, but as a follow-up we need to rename
doc/develop/spl.rst and expand on explaining things a bit.

Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
</content>
</entry>
<entry>
<title>Kbuild: Always use $(PHASE_)</title>
<updated>2025-04-11T18:16:44Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-01T22:55:23Z</published>
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<id>urn:sha1:302b41d5397e9f821d360a74335e8821d4513970</id>
<content type='text'>
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "scsi: ensure writes are flushed to disk"</title>
<updated>2025-04-10T20:21:46Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-10T20:21:46Z</published>
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<id>urn:sha1:d82f7bc94c1b2fc82ebb8be5f743fd7c5292531f</id>
<content type='text'>
Caleb Connolly &lt;caleb.connolly@linaro.org&gt; says:

SCSI devices like UFS may maintain their own cache to speed up writes,
however this is lost on board reset (and may be lost on device removal
or reset by OS drivers).

Currently this can be worked around by "waiting for a while" after
writing data to disk, but of course this is not an acceptable solution.

Ideally U-Boot would have a mechanism to flush caches during board
reset, but until that logic is hooked up let's be sure that all writes
are actually propagated to the storage device so that we don't lose data
on board reset.

The same logic was already implemented just for the AHCI backend, this
duplicated logic has been removed and support for the SYNC_CACHE command
is added to AHCI.

This is particularly noticeable during capsule updates, since the update
file is deleted and the board is reset immediately afterwards which
resulted in the same capsule update being applied over and over again.

This specifically fixes Qualcomm SDM845 devices with UFS 2.1, but likely
all UFS devices that use a cache.

Link: https://lore.kernel.org/r/20250326-scsi-sync-on-write-v2-0-12ab05bd464b@linaro.org
</content>
</entry>
<entry>
<title>ata: ahci: implement SCSI_SYNC_CACHE</title>
<updated>2025-04-10T20:21:41Z</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-03-26T12:24:10Z</published>
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<id>urn:sha1:77c13f30b67c1a30b33b4dd4820c5a2528c3a3bb</id>
<content type='text'>
The SCSI layer now issues a SYNC_CACHE command after every write to
ensure there is no data loss due to a board reset after write.

Implement support for this command and remove the same logic from the
ATA write path to be consistent with other SCSI backends.

Ranges are not supported and the whole cache will be flushed in all
cases.

This was done per iteration in ata_scsiop_read_write(), but it's not
clear why this was the case, calling it once for the entire write ought
to achieve the same result.

Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
</content>
</entry>
<entry>
<title>ata: ahci: remove bad free</title>
<updated>2025-04-08T22:23:27Z</updated>
<author>
<name>Vincent Stehlé</name>
<email>vincent.stehle@arm.com</email>
</author>
<published>2025-03-24T08:34:06Z</published>
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<id>urn:sha1:a345f44a60f57a2741cda9315312d3df28bc22f0</id>
<content type='text'>
In the case of a memory allocation error, the ahci_port_start() function
tries to free the `pp' pointer.
This pointer was not dynamically allocated but does in fact point to an
element of the port[] array member of the struct ahci_uc_priv.
Remove the erroneous call to free() to fix this.

Fixes: 4782ac80b02f ("Add AHCI support to u-boot")
Signed-off-by: Vincent Stehlé &lt;vincent.stehle@arm.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Jason Jin &lt;jason.jin@freescale.com&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
</entry>
<entry>
<title>blk: Make block subsystems select BLK</title>
<updated>2025-01-21T01:26:54Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-01-15T01:22:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a72fa7f2fee76b65c34ec1299334fef4f98aee50'/>
<id>urn:sha1:a72fa7f2fee76b65c34ec1299334fef4f98aee50</id>
<content type='text'>
The BLK symbol has a few meanings, one of which is that it controls the
driver model portion of a "block device". Rather than having this hidden
symbol be "default y if ..." it should be select'd by the various block
subsystems. Symbols such as PVBLOCK which already select'd BLK are
unchanged".

Reviewed-by: Peter Robinson &lt;pbrobinson@gmail.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Implement ACPI on aarch64"</title>
<updated>2024-10-28T00:44:13Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-27T23:14:22Z</published>
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<id>urn:sha1:2800aecce08b47b169d8e9824dd23b1297b2cedc</id>
<content type='text'>
Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt; says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
</content>
</entry>
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