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<title>u-boot.git/drivers/cache/cache-sifive-pl2.c, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<title>cache: add sifive private L2 cache driver</title>
<updated>2023-12-27T09:28:57+00:00</updated>
<author>
<name>Zong Li</name>
<email>zong.li@sifive.com</email>
</author>
<published>2023-12-14T14:09:36+00:00</published>
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<id>64e8482f1c94ab6e1fb4837a8744ca8a156c507e</id>
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This driver is currently responsible for enabling the clock gating
feature of SiFive pre core's private L2 cache.

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
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This driver is currently responsible for enabling the clock gating
feature of SiFive pre core's private L2 cache.

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
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