u-boot.git/drivers/cache, branch v2019.07 Unnamed repository; edit this file 'description' to name the repository. dm: cache: add the pl310 cache controller driver 2019-05-05T12:48:50+00:00 Dinh Nguyen dinguyen@kernel.org 2019-04-23T21:55:04+00:00 88ebf5830fe25cfdfbbee726cb36ea71b111173a Add a PL310 cache controller driver that is usually found on ARMv7(32-bit) devices. The driver configures the cache settings that can be found in the device tree files. This initial revision only configures basic settings(data & instruction prefetch, shared-override, data & tag latency). I believe these are the settings that affect performance the most. Comprehensive settings can be done by the OS. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> 
Add a PL310 cache controller driver that is usually found on
ARMv7(32-bit) devices. The driver configures the cache settings that can
be found in the device tree files.

This initial revision only configures basic settings(data & instruction
prefetch, shared-override, data & tag latency). I believe these are the
settings that affect performance the most. Comprehensive settings can be
done by the OS.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
dm: cache: Create a uclass for cache 2019-05-05T12:48:50+00:00 Dinh Nguyen dinguyen@kernel.org 2019-04-23T21:55:03+00:00 84b124db3584d8b3f1a42c1506983323bce9983f The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller. Add a uclass and a test for cache. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> 
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.

Add a uclass and a test for cache.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>