<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/clk/Kconfig, branch v2017.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/Kconfig?h=v2017.07</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/Kconfig?h=v2017.07'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-05-10T14:16:09Z</updated>
<entry>
<title>dm: clk: add BCM6345 clock driver</title>
<updated>2017-05-10T14:16:09Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2017-05-07T18:13:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5357eb95c02394ace9d2a26c516a07922f1a34aa'/>
<id>urn:sha1:5357eb95c02394ace9d2a26c516a07922f1a34aa</id>
<content type='text'>
This is a simplified version of linux/arch/mips/bcm63xx/clk.c

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>clk: zynq: Add zynq clock framework driver</title>
<updated>2017-02-17T09:22:46Z</updated>
<author>
<name>Stefan Herbrechtsmeier</name>
<email>stefan.herbrechtsmeier@weidmueller.com</email>
</author>
<published>2017-01-17T15:27:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3a64b2536487fe03d4d21d9cefb45b2c841a9d21'/>
<id>urn:sha1:3a64b2536487fe03d4d21d9cefb45b2c841a9d21</id>
<content type='text'>
Add a clock framework driver for the zynq platform. The driver is based
on the platform zynq clock driver but reworked to use static functions
instead of run-time generated objects even for unused clocks.
Additionally the CONFIG_ZYNQ_PS_CLK_FREQ is replaced by the
ps-clk-frequency from the device tree.

Signed-off-by: Stefan Herbrechtsmeier &lt;stefan.herbrechtsmeier@weidmueller.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>clk: zynqmp: Add clock driver support for zynqmp</title>
<updated>2017-01-10T09:18:12Z</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2016-11-15T10:45:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=128ec1fe6f5ee3a753326215732e6030e2c7c4d6'/>
<id>urn:sha1:128ec1fe6f5ee3a753326215732e6030e2c7c4d6</id>
<content type='text'>
Add basic clock driver support for zynqmp which
sets the required clock for GEM controller

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>clk: boston: Providea simple driver for Boston board clocks</title>
<updated>2016-09-21T13:04:32Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-09-08T06:47:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dd7c749474e0976cfc7e78dc9032d7fa8b9b9632'/>
<id>urn:sha1:dd7c749474e0976cfc7e78dc9032d7fa8b9b9632</id>
<content type='text'>
Add a simple driver for the clocks provided by the MIPS Boston
development board. The system provides information about 2 clocks whose
rates are fixed by the bitfile flashed in the boards FPGA, and this
driver simply reads the rates of these 2 clocks.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-atmel</title>
<updated>2016-08-15T21:31:23Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-08-15T21:31:23Z</published>
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<id>urn:sha1:0fcb9f07a1d086fc6951c08d2fc1cf6048bd54e2</id>
<content type='text'>
</content>
</entry>
<entry>
<title>clk: at91: Add clock driver</title>
<updated>2016-08-15T20:12:00Z</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2016-07-20T09:55:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e5935c04e891abb38a92a893f3457cdf304ef4f'/>
<id>urn:sha1:9e5935c04e891abb38a92a893f3457cdf304ef4f</id>
<content type='text'>
The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>clock: add Tegra186 clock driver</title>
<updated>2016-08-15T17:26:13Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-08-08T17:28:24Z</published>
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<id>urn:sha1:d9fd7008f48ba3361133e3b901322a724fd2aced</id>
<content type='text'>
In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually
any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: exynos: add clock driver for Exynos7420 Soc</title>
<updated>2016-05-25T01:00:18Z</updated>
<author>
<name>Thomas Abraham</name>
<email>thomas.ab@samsung.com</email>
</author>
<published>2016-04-23T16:48:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=166097e8775343898cab84f1f23b4aacb35783db'/>
<id>urn:sha1:166097e8775343898cab84f1f23b4aacb35783db</id>
<content type='text'>
Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks
are added in this initial version of the driver.

Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Thomas Abraham &lt;thomas.ab@samsung.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>clk: uniphier: add Media I/O clock driver for UniPhier SoCs</title>
<updated>2016-02-14T07:36:13Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-02-02T12:11:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=48264d9beba2ccc18b9497944048eea135883529'/>
<id>urn:sha1:48264d9beba2ccc18b9497944048eea135883529</id>
<content type='text'>
This is the initial commit for the UniPhier clock drivers.
Currently, only the Media I/O clock is supported.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>clk: move Kconfig options into sub-menu</title>
<updated>2016-01-21T02:06:23Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-01-12T07:36:38Z</published>
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<id>urn:sha1:813858186625b23c9dac287bfe6c0c6a2b4f6686</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
</feed>
