u-boot.git/drivers/clk/Makefile, branch v2017.09

spl: dm: Kconfig: split CLK support for SPL and TPL

2017-08-13T15:12:20Z

Introduce TPL_CLK to allow finer-grained selection of TPL features for feature-rich (i.e. DM-based) TPL stages. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Reviewed-by: Tom Rini

clk: rmobile: Add RCar Gen3 clock driver

2017-08-02T19:26:24Z

Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs . This driver allows reading out the clock configuration set by previous boot stages and enabling and disabling clock using the MSTP registers. Setting clock is not supported thus far. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu

dm: clk: add BCM6345 clock driver

2017-05-10T14:16:09Z

This is a simplified version of linux/arch/mips/bcm63xx/clk.c Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass

clk: stm32f7: add clock driver for stm32f7 family

2017-03-17T18:15:12Z

add basic clock driver support for stm32f7 to enable clocks required by the peripherals. Signed-off-by: Vikas Manocha Reviewed-by: Simon Glass

clk: zynq: Add zynq clock framework driver

2017-02-17T09:22:46Z

Add a clock framework driver for the zynq platform. The driver is based on the platform zynq clock driver but reworked to use static functions instead of run-time generated objects even for unused clocks. Additionally the CONFIG_ZYNQ_PS_CLK_FREQ is replaced by the ps-clk-frequency from the device tree. Signed-off-by: Stefan Herbrechtsmeier Signed-off-by: Michal Simek

aspeed: Add basic ast2500-specific drivers and configuration

2017-01-28T19:04:29Z

Clock Driver This driver is ast2500-specific and is not compatible with earlier versions of this chip. The differences are not that big, but they are in somewhat random places, so making it compatible with ast2400 is not worth the effort at the moment. SDRAM MC driver The driver is very ast2500-specific and is completely incompatible with previous versions of the chip. The memory controller is very poorly documented by Aspeed in the datasheet, with any mention of the whole range of registers missing. The initialization procedure has been basically taken from Aspeed SDK, where it is implemented in assembly. Here it is rewritten in C, with very limited understanding of what exactly it is doing. Reviewed-by: Simon Glass

clk: zynqmp: Add clock driver support for zynqmp

2017-01-10T09:18:12Z

Add basic clock driver support for zynqmp which sets the required clock for GEM controller Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek Reviewed-by: Simon Glass

clk: boston: Providea simple driver for Boston board clocks

2016-09-21T13:04:32Z

Add a simple driver for the clocks provided by the MIPS Boston development board. The system provides information about 2 clocks whose rates are fixed by the bitfile flashed in the boards FPGA, and this driver simply reads the rates of these 2 clocks. Signed-off-by: Paul Burton Reviewed-by: Simon Glass

Merge branch 'master' of git://git.denx.de/u-boot-atmel

2016-08-15T21:31:23Z

clk: at91: Add clock driver

2016-08-15T20:12:00Z

The patch is referred to at91 clock driver of Linux, to make the clock node descriptions in DT aligned with the Linux's. Signed-off-by: Wenyou Yang Reviewed-by: Simon Glass