u-boot.git/drivers/clk/Makefile, branch v2018.03

clk: Makefile: Sort entries alphabetically

2018-01-21T17:01:02Z

The Makefile entries in the clk driver directory were not alphabetically sorted. Correct this. Reviewed-by: Simon Glass Signed-off-by: Mario Six

ARC: clk: introduce HSDK CGU clock driver

2017-12-11T08:36:23Z

Synopsys HSDK clock controller generates and supplies clocks to various controllers and peripherals within the SoC. Each clock has assigned identifier and client device tree nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device tree sources. Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin

clk: stm32f7: rename clk_stm32f7.c to clk_stm32f.c

2017-11-30T03:30:50Z

Now that clk_stm32f7.c manages clocks for both STM32F4 and F7 SoCs rename it to a more generic clk_stm32f.c Fix also some checkpatch errors/warnings. Signed-off-by: Patrice Chotard Reviewed-by: Vikas Manocha

dm: clk: add clk driver support for stm32h7 SoCs

2017-09-22T11:40:01Z

This driver implements basic clock setup, only clock gating is implemented. This driver doesn't implement .of_match as it's binded by MFD RCC driver. Files include/dt-bindings/clock/stm32h7-clks.h and doc/device-tree-bindings/clock/st,stm32h7-rcc.txt will be available soon in a kernel tag, as all the bindings have been acked by Rob Herring [1]. [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html Signed-off-by: Patrice Chotard Reviewed-by: Simon Glass

spl: dm: Kconfig: split CLK support for SPL and TPL

2017-08-13T15:12:20Z

Introduce TPL_CLK to allow finer-grained selection of TPL features for feature-rich (i.e. DM-based) TPL stages. Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass Reviewed-by: Tom Rini

clk: rmobile: Add RCar Gen3 clock driver

2017-08-02T19:26:24Z

Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs . This driver allows reading out the clock configuration set by previous boot stages and enabling and disabling clock using the MSTP registers. Setting clock is not supported thus far. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu

dm: clk: add BCM6345 clock driver

2017-05-10T14:16:09Z

This is a simplified version of linux/arch/mips/bcm63xx/clk.c Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Simon Glass

clk: stm32f7: add clock driver for stm32f7 family

2017-03-17T18:15:12Z

add basic clock driver support for stm32f7 to enable clocks required by the peripherals. Signed-off-by: Vikas Manocha Reviewed-by: Simon Glass

clk: zynq: Add zynq clock framework driver

2017-02-17T09:22:46Z

Add a clock framework driver for the zynq platform. The driver is based on the platform zynq clock driver but reworked to use static functions instead of run-time generated objects even for unused clocks. Additionally the CONFIG_ZYNQ_PS_CLK_FREQ is replaced by the ps-clk-frequency from the device tree. Signed-off-by: Stefan Herbrechtsmeier Signed-off-by: Michal Simek

aspeed: Add basic ast2500-specific drivers and configuration

2017-01-28T19:04:29Z

Clock Driver This driver is ast2500-specific and is not compatible with earlier versions of this chip. The differences are not that big, but they are in somewhat random places, so making it compatible with ast2400 is not worth the effort at the moment. SDRAM MC driver The driver is very ast2500-specific and is completely incompatible with previous versions of the chip. The memory controller is very poorly documented by Aspeed in the datasheet, with any mention of the whole range of registers missing. The initialization procedure has been basically taken from Aspeed SDK, where it is implemented in assembly. Here it is rewritten in C, with very limited understanding of what exactly it is doing. Reviewed-by: Simon Glass