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<title>u-boot.git/drivers/clk/Makefile, branch v2024.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/Makefile?h=v2024.07</id>
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<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2024-05-19T14:16:36Z</updated>
<entry>
<title>Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""</title>
<updated>2024-05-19T14:16:36Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-19T02:20:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d678a59d2d719da9e807495b4b021501f2836ca5'/>
<id>urn:sha1:d678a59d2d719da9e807495b4b021501f2836ca5</id>
<content type='text'>
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>drivers: clk: adi: Add in SC5XX-family clock driver</title>
<updated>2024-05-08T01:24:00Z</updated>
<author>
<name>Nathan Barrett-Morrison</name>
<email>nathan.morrison@timesys.com</email>
</author>
<published>2024-04-25T00:04:01Z</published>
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<id>urn:sha1:16fe1118da91fedb564cb323bec2eeab6bdddde8</id>
<content type='text'>
This adds support for the SC5XX clock trees which are required for reading
clock speeds on the SoCs. This is largely a port of the same support for
Linux, which has not yet been submitted upstream.

Co-developed-by: Greg Malysa &lt;greg.malysa@timesys.com&gt;
Signed-off-by: Greg Malysa &lt;greg.malysa@timesys.com&gt;
Co-developed-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Vasileios Bimpikas &lt;vasileios.bimpikas@analog.com&gt;
Signed-off-by: Utsav Agarwal &lt;utsav.agarwal@analog.com&gt;
Signed-off-by: Arturs Artamonovs &lt;arturs.artamonovs@analog.com&gt;
Signed-off-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
</content>
</entry>
<entry>
<title>clk/qcom: move from mach-snapdragon</title>
<updated>2024-01-16T12:26:23Z</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2023-11-07T12:40:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a623c14f43d065a24e9ff7a1dfcbe38e5f9fed7e'/>
<id>urn:sha1:a623c14f43d065a24e9ff7a1dfcbe38e5f9fed7e</id>
<content type='text'>
Clock drivers don't belong here, move them to the right place and
declutter mach-snapdragon a bit.

To de-couple these drivers from specific "target" platforms, add
additional config options to enable each clock driver gated behind a
common CLK_QCOM option and enable them by default for the respective
targets. This will make future work easier as we move towards a generic
Qualcomm target.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Use the right symbol in the Makefile</title>
<updated>2023-11-12T16:46:16Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2023-10-31T04:49:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ca43266562461c3bd871da5adffecc46eb05dc56'/>
<id>urn:sha1:ca43266562461c3bd871da5adffecc46eb05dc56</id>
<content type='text'>
CONFIG_ARCH_SUNXI will not be enabled for RISC-V SoCs using this driver.
Use the symbol for the driver itself instead.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
</entry>
<entry>
<title>clk: Add GPIO-controlled clock gate driver</title>
<updated>2023-09-09T02:53:31Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2023-08-13T23:51:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=92d5f99633e4d0a33ea1f22e28674440ddcd7072'/>
<id>urn:sha1:92d5f99633e4d0a33ea1f22e28674440ddcd7072</id>
<content type='text'>
Add driver which implements GPIO-controlled clock. The GPIO is used
as a gate to enable/disable the clock. This matches linux clk-gpio.c
driver, however this does not implement the GPIO mux part, which in
U-Boot DM would be better fit in separate driver.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-rockchip-20230421' of https://source.denx.de/u-boot/custodians/u-boot-rockchip</title>
<updated>2023-04-23T16:15:56Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-04-23T16:15:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=328fdeb9c9a8178a262dcebb9991a2ffff5788b1'/>
<id>urn:sha1:328fdeb9c9a8178a262dcebb9991a2ffff5788b1</id>
<content type='text'>
- Add rk3588 evb support;
- Update pinctrl for rk3568 and rk3588;
- Update rk3288 dts;
- Update mmc support for rk3568 and rk3588;
- Add rng support for rk3588;
- Add DSI support for rk3568;
- Some other misc fixes in dts, config, driver;
</content>
</entry>
<entry>
<title>clk: scmi: Add Kconfig option for SPL</title>
<updated>2023-04-21T07:16:01Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2023-04-17T19:07:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=22297581187c346740d5af4ee603701142b58fd6'/>
<id>urn:sha1:22297581187c346740d5af4ee603701142b58fd6</id>
<content type='text'>
Building U-Boot SPL with CLK_SCMI and SCMI_FIRMWARE Kconfig options
enabled and SPL_FIRMWARE disabled result in the following error.

  drivers/clk/clk_scmi.o: in function `scmi_clk_gate':
  drivers/clk/clk_scmi.c:84: undefined reference to `devm_scmi_process_msg'
  drivers/clk/clk_scmi.c:88: undefined reference to `scmi_to_linux_errno'
  drivers/clk/clk_scmi.o: in function `scmi_clk_get_rate':
  drivers/clk/clk_scmi.c:113: undefined reference to `devm_scmi_process_msg'
  drivers/clk/clk_scmi.c:117: undefined reference to `scmi_to_linux_errno'
  drivers/clk/clk_scmi.o: in function `scmi_clk_set_rate':
  drivers/clk/clk_scmi.c:139: undefined reference to `devm_scmi_process_msg'
  drivers/clk/clk_scmi.c:143: undefined reference to `scmi_to_linux_errno'
  drivers/clk/clk_scmi.o: in function `scmi_clk_probe':
  drivers/clk/clk_scmi.c:157: undefined reference to `devm_scmi_of_get_channel'
  make[1]: *** [scripts/Makefile.spl:527: spl/u-boot-spl] Error 1
  make: *** [Makefile:2043: spl/u-boot-spl] Error 2

Add Kconfig option so that CLK_SCMI can be disabled in SPL to fix this.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>clk: starfive: Add StarFive JH7110 clock driver</title>
<updated>2023-04-20T08:08:44Z</updated>
<author>
<name>Yanhong Wang</name>
<email>yanhong.wang@starfivetech.com</email>
</author>
<published>2023-03-29T03:42:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c13fe7c034fa2b616cc0223e20fd365afb36574a'/>
<id>urn:sha1:c13fe7c034fa2b616cc0223e20fd365afb36574a</id>
<content type='text'>
Add a DM clock driver for StarFive JH7110 SoC.

Signed-off-by: Yanhong Wang &lt;yanhong.wang@starfivetech.com&gt;
Tested-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: Add directory for STM32 clock drivers</title>
<updated>2022-06-17T12:11:43Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2022-05-19T15:56:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b99293338ecd128ab86c6af9d9555dff59978016'/>
<id>urn:sha1:b99293338ecd128ab86c6af9d9555dff59978016</id>
<content type='text'>
Add a directory in drivers/clk to regroup the clock drivers for all
STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or
CONFIG_ARCH_STM32MP (MPUs with cortex A).

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Reviewed-by: Grzegorz Szymaszek &lt;gszymaszek@short.pl&gt;
Acked-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Change-Id: I955af307963f732167396f0157a30cf2fc91f150
</content>
</entry>
<entry>
<title>clk: nuvoton: Add support for NPCM750</title>
<updated>2022-05-05T13:28:47Z</updated>
<author>
<name>Jim Liu</name>
<email>jim.t90615@gmail.com</email>
</author>
<published>2022-04-19T05:32:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c7554574ff1532983149ab6d7351896d1010b14e'/>
<id>urn:sha1:c7554574ff1532983149ab6d7351896d1010b14e</id>
<content type='text'>
Add clock controller driver for NPCM750

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
Signed-off-by: Stanley Chu &lt;yschu@nuvoton.com&gt;
Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
</content>
</entry>
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