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<title>u-boot.git/drivers/clk/airoha, branch next</title>
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<updated>2026-07-17T20:50:35Z</updated>
<entry>
<title>clk: airoha: fix off-by-one in clock ID boundary check</title>
<updated>2026-07-17T20:50:35Z</updated>
<author>
<name>Wayen Yan</name>
<email>win847@gmail.com</email>
</author>
<published>2026-07-08T04:06:08Z</published>
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<id>urn:sha1:fdfe2ec48d5c1c2ed03073d73edd3fdd3fe1ffa1</id>
<content type='text'>
The boundary checks in airoha_clk_enable(), airoha_clk_get_rate(), and
airoha_clk_set_rate() use "id &gt; data-&gt;num_clocks" which allows id equal
to num_clocks to pass. Since data-&gt;descs[] has exactly num_clocks entries
(indices 0 to num_clocks-1), id=num_clocks results in an out-of-bounds
array access.

This is currently not triggered because the device tree clock IDs are
within bounds, but the check should be defensive. Fix by changing the
comparison from "&gt;" to "&gt;=".

Fixes: d0b81afb5ec9 ("clk: airoha: Add support for Airoha AN7581 SoC clock")
Signed-off-by: Wayen Yan &lt;win847@gmail.com&gt;
</content>
</entry>
<entry>
<title>clk: airoha: add support for airoha en7523 SoC family</title>
<updated>2025-11-07T22:00:59Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-01T00:44:50Z</published>
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<id>urn:sha1:ee82f804dd52c62cef0d6e4101a9fd897064409d</id>
<content type='text'>
This adds clock driver for airoha en7523/en7529/en7562 SoCs. The code
is based on corresponding linux driver.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
</entry>
<entry>
<title>clk: airoha: use CHIP_SCU regmap helper</title>
<updated>2025-11-07T22:00:58Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2025-11-01T00:44:49Z</published>
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<id>urn:sha1:f8cef0b7435b65b0a33b541c28081b357a76d4c3</id>
<content type='text'>
Use common helper to get CHIP_SCU registers.

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
</entry>
<entry>
<title>reset: airoha: Add driver for controlling reset line of AN7581</title>
<updated>2025-04-01T14:44:51Z</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2025-03-14T18:59:23Z</published>
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<id>urn:sha1:b02b8b767624a859a2776c11822119392702bbab</id>
<content type='text'>
Add driver for controlling the reset lines of AN7581. This is a detached
version of the clock controller driver present in Linux only used to
control reset lines. Driver gets loaded with the bind of the clock
driver and doesn't require a compatible. This is needed as they share
the same registers.

Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
</entry>
<entry>
<title>clk: airoha: Add support for Airoha AN7581 SoC clock</title>
<updated>2025-04-01T14:44:51Z</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2025-03-14T18:59:22Z</published>
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<id>urn:sha1:d0b81afb5ec9d2d8a3f11bfc827f2f24c32d47ec</id>
<content type='text'>
Add support for Airoha AN7581 SoC clock driver. This mainly needed for
eMMC support to correctly get the current clock applied.

Based on the Linux clk-en7523.c but majorly reworked for U-Boot that
doesn't require CCF subsystem.

Major modification, support for set_rate, realtime get_rate and split
for reset part to a different driver.

Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
</entry>
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