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<title>u-boot.git/drivers/clk/aspeed, branch v2024.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/aspeed?h=v2024.04</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/aspeed?h=v2024.04'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2024-01-30T03:35:02Z</updated>
<entry>
<title>treewide: Remove clk_free</title>
<updated>2024-01-30T03:35:02Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2023-12-16T19:38:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c9309f40a6831b1ac5cd0a7227b5c3717d34c812'/>
<id>urn:sha1:c9309f40a6831b1ac5cd0a7227b5c3717d34c812</id>
<content type='text'>
This function is a no-op. Remove it.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
</content>
</entry>
<entry>
<title>clk: treewide: switch to clock dump from clk_ops</title>
<updated>2023-12-15T18:05:54Z</updated>
<author>
<name>Igor Prusov</name>
<email>ivprusov@sberdevices.ru</email>
</author>
<published>2023-11-09T10:55:15Z</published>
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<id>urn:sha1:bc3e313ff6af4b5cb09749185d0602a3d4b9b240</id>
<content type='text'>
Switch to using new dump operation in clock provider drivers instead of
overriding soc_clk_dump.

Tested-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Signed-off-by: Igor Prusov &lt;ivprusov@sberdevices.ru&gt;
Link: https://lore.kernel.org/r/20231109105516.24892-8-ivprusov@sberdevices.ru
</content>
</entry>
<entry>
<title>clk: ast2600: Move soc_clk_dump function</title>
<updated>2023-12-15T17:33:09Z</updated>
<author>
<name>Igor Prusov</name>
<email>ivprusov@sberdevices.ru</email>
</author>
<published>2023-11-09T10:55:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3f192541df79fef2eaaa38ecb3e80fc6b8440fb7'/>
<id>urn:sha1:3f192541df79fef2eaaa38ecb3e80fc6b8440fb7</id>
<content type='text'>
Move clock dump function to avoid forward declaration after switching to
dump in clk_ops.

Signed-off-by: Igor Prusov &lt;ivprusov@sberdevices.ru&gt;
Link: https://lore.kernel.org/r/20231109105516.24892-3-ivprusov@sberdevices.ru
</content>
</entry>
<entry>
<title>clk: ast2600: Keep PLL power on</title>
<updated>2023-03-06T22:03:56Z</updated>
<author>
<name>Dylan Hung</name>
<email>dylan_hung@aspeedtech.com</email>
</author>
<published>2023-02-21T13:01:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=95f79553849cfb936f8c1e8d453b5a8b73db462c'/>
<id>urn:sha1:95f79553849cfb936f8c1e8d453b5a8b73db462c</id>
<content type='text'>
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.

Signed-off-by: Dylan Hung &lt;dylan_hung@aspeedtech.com&gt;
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Get HCLK frequency support</title>
<updated>2022-09-13T16:08:40Z</updated>
<author>
<name>Chin-Ting Kuo</name>
<email>chin-ting_kuo@aspeedtech.com</email>
</author>
<published>2022-08-19T09:01:02Z</published>
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<id>urn:sha1:a7e82204743c3095deeac73e3142152d325141f8</id>
<content type='text'>
User can get correct HCLK frequency during driver probe stage
by adding the following configuration in the device tree.
"clocks = &lt;&amp;scu ASPEED_CLK_AHB&gt;".

Signed-off-by: Chin-Ting Kuo &lt;chin-ting_kuo@aspeedtech.com&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>clk/ast2500: Add SD clock</title>
<updated>2022-07-06T18:31:29Z</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2022-06-23T09:05:32Z</published>
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<id>urn:sha1:50204533dc92b570e46b15e0bf2ab3feb57e8690</id>
<content type='text'>
In order to use the clock from the sdhci driver, add the SD clock.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk/ast2600: Adjust eMMC clock names</title>
<updated>2022-07-06T18:31:29Z</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2022-06-23T09:05:31Z</published>
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<id>urn:sha1:85bb3a4eee1a9822e4cbcdaa250ec58061bdee79</id>
<content type='text'>
Adjust clock to stay compatible with those used by the Linux kernel
device tree.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk/aspeed: Add debug message when clock fails</title>
<updated>2022-07-06T18:31:29Z</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2022-06-23T09:05:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=67e20f9d65f1de5bc68753beba6f94c87272629b'/>
<id>urn:sha1:67e20f9d65f1de5bc68753beba6f94c87272629b</id>
<content type='text'>
A common message across platforms that prints the clock number.

Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>doc: replace @return by Return:</title>
<updated>2022-01-19T17:11:34Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2022-01-19T17:05:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=185f812c419f1b4f0d10d9787d59cf9f11a2a600'/>
<id>urn:sha1:185f812c419f1b4f0d10d9787d59cf9f11a2a600</id>
<content type='text'>
Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</content>
</entry>
<entry>
<title>clk: ast2600: Revise MII interface delay</title>
<updated>2022-01-18T17:48:17Z</updated>
<author>
<name>Dylan Hung</name>
<email>dylan_hung@aspeedtech.com</email>
</author>
<published>2021-12-09T02:12:28Z</published>
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<id>urn:sha1:e559193968f213f15f1522315e5937ed52c6d444</id>
<content type='text'>
The clock delay of the RMII/RGMII interface is controlled by SCU340~35C.
These values are obtained by measurement and experiments so we simply
use macro to define them.

Signed-off-by: Dylan Hung &lt;dylan_hung@aspeedtech.com&gt;
Reviewed-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
</content>
</entry>
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