u-boot.git/drivers/clk/at91/Makefile, branch master Unnamed repository; edit this file 'description' to name the repository. clk: at91: sama7d65: add clock support 2025-07-25T08:54:43+00:00 Ryan Wanner Ryan.Wanner@microchip.com 2025-07-07T11:32:50+00:00 8dff5dd290584504569b95b4ea4a69e5c81f5981 Add clock support for SAMA7D65 Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> [romain.sioen@microchip.com: add Fractional PLL core output range] Signed-off-by: Romain Sioen <romain.sioen@microchip.com> [varshini.rajendran@microchip.com: adapt driver to upstream] Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> 
Add clock support for SAMA7D65

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
[romain.sioen@microchip.com: add Fractional PLL core
output range]
Signed-off-by: Romain Sioen <romain.sioen@microchip.com>
[varshini.rajendran@microchip.com: adapt driver to upstream]
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
clk: at91: sam9x7: add pmc driver for sam9x7 SoC family 2025-06-19T10:56:43+00:00 Varshini Rajendran varshini.rajendran@microchip.com 2025-06-03T05:05:52+00:00 c9d609be6074d8c3bb89c871791b2315b580777b Add PMC driver support for sam9x7 SoC family Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> [balamanikandan.gunasundar@microchip.com: Add peripheral clock id for pmecc] Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com> 
Add PMC driver support for sam9x7 SoC family

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
[balamanikandan.gunasundar@microchip.com: Add peripheral clock id for pmecc]
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
clk: at91: Add support for sam9x60 USB clock 2023-03-27T11:27:37+00:00 Sergiu Moga sergiu.moga@microchip.com 2023-03-08T14:39:50+00:00 0a0f0e737bcc58664164dc1c04886104d394918e Implement sam9x60 USB clock driver. This clock has three parents: PLLA, UPLL and MAINXTAL. The driver is aware of the three possible parents with the help of the two mux tables provied to the driver during the registration of the clock. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
Implement sam9x60 USB clock driver. This clock has
three parents: PLLA, UPLL and MAINXTAL. The driver is
aware of the three possible parents with the help of the
two mux tables provied to the driver during the registration
of the clock.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk: at91: sam9x60: add support compatible with CCF 2020-10-19T06:19:53+00:00 Claudiu Beznea claudiu.beznea@microchip.com 2020-10-07T15:17:08+00:00 a64862284f650d001e15555680ec95d4893cebc1 Add SAM9X60 clock support compatible with CCF. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
Add SAM9X60 clock support compatible with CCF.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk: at91: sama7g5: add clock support 2020-09-22T08:27:18+00:00 Claudiu Beznea claudiu.beznea@microchip.com 2020-09-07T14:46:52+00:00 6a6fe3ed4d80afba7efc65a87aca5344672768c5 Add clock support for SAMA7G5. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
Add clock support for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk: at91: clk-generic: add driver compatible with ccf 2020-09-22T08:27:18+00:00 Claudiu Beznea claudiu.beznea@microchip.com 2020-09-07T14:46:50+00:00 36a9630fcbb0bfb2d3fc6c04ae9de666846ced32 Add clk-generic driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
Add clk-generic driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk: at91: clk-peripheral: add driver compatible with ccf 2020-09-22T08:27:18+00:00 Claudiu Beznea claudiu.beznea@microchip.com 2020-09-07T14:46:49+00:00 f89268e46814a56323ca78b85eb0e32e6ef3cbd0 Add clk-peripheral compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
Add clk-peripheral compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk: at91: clk-system: add driver compatible with ccf 2020-09-22T08:27:18+00:00 Claudiu Beznea claudiu.beznea@microchip.com 2020-09-07T14:46:48+00:00 16502bfa7c969cff366f92de67c048d2b0c626b8 Add clk-system driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
Add clk-system driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk: at91: clk-programmable: add driver compatible with ccf 2020-09-22T08:27:18+00:00 Claudiu Beznea claudiu.beznea@microchip.com 2020-09-07T14:46:47+00:00 2a1a579bde83f0ab6a6eb61a4189820972bfe691 Add clk-programmable driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
Add clk-programmable driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk: at91: clk-utmi: add driver compatible with ccf 2020-09-22T08:27:18+00:00 Claudiu Beznea claudiu.beznea@microchip.com 2020-09-07T14:46:45+00:00 ad4d39a964e1d3abb4f2c3d933234f86a7960d54 Add clk-utmi driver compatible with common clock framework. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> 
Add clk-utmi driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>