u-boot.git/drivers/clk/mediatek, branch v2020.04

clk: mediatek: use unsigned type for returning the clk rate

2020-01-26T11:03:06Z

mtk_clk_find_parent_rate is calling clk_get_rate to know the rate of a parent clock. clk_get_rate returns a ulong, while mtk_clk_find_parent_rate returns an int. This implicit cast creates an issue for clock rates big enough to need the full 32 bits to store its data. When that happen the clk rate will become incorrect because of the implicit cast between ulong -> int -> ulong. This commit change the return type of mtk_clk_find_parent_rate to ulong. Signed-off-by: Fabien Parent

clk: mediatek: fix clock-rate overflow problem

2020-01-16T14:39:45Z

This patch fix clock-rate overflow problem in mediatek clock driver common part. Signed-off-by: Sam Shih Reviewed-by: Ryder Lee

clk: mediatek: add driver for MT7622

2020-01-16T14:39:45Z

This patch add clock driver for MediaTek MT7622 SoC. Signed-off-by: Ryder Lee Signed-off-by: Sam Shih

clk: mediatek: mt7629: add support for ssusbsys

2020-01-16T14:39:45Z

The SSUSB IP's clocks come from ssusbsys module on mt7629, so add its driver Signed-off-by: Chunfeng Yun Reviewed-by: Simon Glass Reviewed-by: Ryder Lee

clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll

2020-01-16T14:39:45Z

Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512

clk: mediatek: add set_clr_upd mux type flow

2020-01-16T14:39:45Z

Add new set_clr_upd mux type and related operation to mtk common clock driver to support mt8512

clk: mediatek: add driver support for MT8512

2020-01-16T14:39:45Z

Add clock driver for MediaTek MT8512 SoC, include topckgen, apmixedsys and infracfg support. Signed-off-by: mingming lee

clk: mediatek: add driver for MT8518

2019-12-03T13:44:14Z

Add clock driver for MediaTek MT8518 SoC. Signed-off-by: mingming lee

clk: MediaTek: add hifsys entry for MT7623 SoC.

2019-08-07T19:31:03Z

This adds high speed interface subsystem - hifsys (i.e. PCIe and USB) for MT7623 SoC and enables its reset controller. The control block is shared with ethsys and accordingly rename the related defines. Tested-by: Frank Wunderlich Signed-off-by: Ryder Lee

clk: mediatek: add driver for MT8516

2019-04-23T21:57:26Z

Add clock driver for MediaTek MT8516 SoC. Signed-off-by: Fabien Parent Acked-by: Ryder Lee [trini: Redo whitespace] Signed-off-by: Tom Rini