<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/clk/mediatek, branch v2023.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/mediatek?h=v2023.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/mediatek?h=v2023.01'/>
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<updated>2022-09-23T19:09:16Z</updated>
<entry>
<title>clk: mediatek: add clock driver support for MediaTek MT7981 SoC</title>
<updated>2022-09-23T19:09:16Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-09-09T12:00:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=40746bf429d22e28680290cb73afe60924efda1c'/>
<id>urn:sha1:40746bf429d22e28680290cb73afe60924efda1c</id>
<content type='text'>
This patch adds clock driver support for MediaTek MT7981 SoC

Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: add clock driver support for MediaTek MT7986 SoC</title>
<updated>2022-09-23T19:09:16Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-09-09T12:00:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=37d5a9a29dce9fba04e77e89373d3404c7fdb2ec'/>
<id>urn:sha1:37d5a9a29dce9fba04e77e89373d3404c7fdb2ec</id>
<content type='text'>
This patch adds clock driver support for MediaTek MT7986 SoC

Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: add CLK_XTAL support for clock driver</title>
<updated>2022-09-23T19:09:16Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-09-09T12:00:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ad832b915a7f07e60eb58ed99bc36da5c3de8d42'/>
<id>urn:sha1:ad832b915a7f07e60eb58ed99bc36da5c3de8d42</id>
<content type='text'>
This adds the CLK_XTAL macro/flag to allow modeling clocks which are
directly connected to the xtal clock.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: add infrasys clock mux support</title>
<updated>2022-09-23T19:09:16Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-09-09T12:00:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=570b0840b19a34ca6e42923c2cba0c8c64677e15'/>
<id>urn:sha1:570b0840b19a34ca6e42923c2cba0c8c64677e15</id>
<content type='text'>
This patch adds infrasys clock mux support for mediatek clock drivers.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: add support to configure clock driver parent</title>
<updated>2022-09-23T19:09:16Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-09-09T12:00:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=98a8bbb9ea6de81407f338926e10cc1f743b9ba6'/>
<id>urn:sha1:98a8bbb9ea6de81407f338926e10cc1f743b9ba6</id>
<content type='text'>
This patch adds support for a clock node to configure its parent clock
where possible.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: add CLK_BYPASS_XTAL flag to allow bypassing searching clock parent of xtal clock</title>
<updated>2022-09-23T19:09:16Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-09-09T11:59:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7fb33e9aea514cfd873d8005954108a482e9e693'/>
<id>urn:sha1:7fb33e9aea514cfd873d8005954108a482e9e693</id>
<content type='text'>
The mtk clock framework in u-boot uses array index for searching clock
parent (kernel uses strings for search), so we need to specify a special
clock with ID=0 for CLK_XTAL in u-boot.

In the mt7622/mt7629 clock tree, the clocks with ID=0 never call
mtk_topckgen_get_mux_rate, adn return xtal clock directly. This what we
expected.

However for newer chips, they may have some clocks with ID=0 not
representing the xtal clock and still needs mtk_topckgen_get_mux_rate be
called. Current logic will make entire clock driver not working.

This patch adds a flag to indicate that whether a clock driver needs clocks
with ID=0 to call mtk_topckgen_get_mux_rate.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: Add MT8183 clock driver</title>
<updated>2021-01-18T20:14:13Z</updated>
<author>
<name>Fabien Parent</name>
<email>fparent@baylibre.com</email>
</author>
<published>2020-10-17T10:52:15Z</published>
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<id>urn:sha1:c9d7e79f02ef8184ab854fef5decc2f100447cef</id>
<content type='text'>
Add the topckgen, apmixedsys and infracfg clock driver for the MT8183
SoC.

Signed-off-by: Fabien Parent &lt;fparent@baylibre.com&gt;
</content>
</entry>
<entry>
<title>dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()</title>
<updated>2021-01-05T19:26:35Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-29T03:34:56Z</published>
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<id>urn:sha1:65e25bea597ccaaea756c593318bea1e574d8df1</id>
<content type='text'>
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: treewide: Rename auto_alloc_size members to be shorter</title>
<updated>2020-12-13T15:00:25Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-03T23:55:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=41575d8e4c334df148c4cdd7c40cc825dc0fcaa1'/>
<id>urn:sha1:41575d8e4c334df148c4cdd7c40cc825dc0fcaa1</id>
<content type='text'>
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>clk: mt7622: add needed clocks for ssusb-node</title>
<updated>2020-08-24T18:11:31Z</updated>
<author>
<name>Frank Wunderlich</name>
<email>frank-w@public-files.de</email>
</author>
<published>2020-08-20T14:37:55Z</published>
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<id>urn:sha1:9f25aa13ea2f106885ea52a1039b9c6e7a677a35</id>
<content type='text'>
MT7622 needs additional clock definitions to work properly

Signed-off-by: Frank Wunderlich &lt;frank-w@public-files.de&gt;
</content>
</entry>
</feed>
