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<title>u-boot.git/drivers/clk/microchip, branch v2022.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/microchip?h=v2022.10</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/microchip?h=v2022.10'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2022-03-30T18:18:56Z</updated>
<entry>
<title>clk: Use generic CCF ops where possible</title>
<updated>2022-03-30T18:18:56Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2022-03-20T20:34:46Z</published>
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<id>urn:sha1:682e73d23555afdd733c20810d282d9cc2bc0e0f</id>
<content type='text'>
This converts most CCF drivers to use generic ops. imx6q is the only
outlier, where we retain the existing functionality by moving the check to
request().

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com
[ fixed missing include for at91 ]
Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
</content>
</entry>
<entry>
<title>doc: replace @return by Return:</title>
<updated>2022-01-19T17:11:34Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2022-01-19T17:05:50Z</published>
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<id>urn:sha1:185f812c419f1b4f0d10d9787d59cf9f11a2a600</id>
<content type='text'>
Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</content>
</entry>
<entry>
<title>clk: mpfs_clk: Enable DM_FLAG_PRE_RELOC flag</title>
<updated>2021-04-08T07:37:30Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2021-03-31T07:24:49Z</published>
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<id>urn:sha1:53a97d22f1670f31794a2336d8fecaffeee7ffde</id>
<content type='text'>
This driver is needed in the pre-relocation phase as the serial
driver depends on it.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
Tested-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
</content>
</entry>
<entry>
<title>clk: Add Microchip PolarFire SoC clock driver</title>
<updated>2021-01-18T03:06:38Z</updated>
<author>
<name>Padmarao Begari</name>
<email>padmarao.begari@microchip.com</email>
</author>
<published>2021-01-15T02:50:38Z</published>
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<id>urn:sha1:2f27c9219e45c8abcbd53b0e66eff1f5bcae7c7e</id>
<content type='text'>
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.

Signed-off-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Tested-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</content>
</entry>
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