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<title>u-boot.git/drivers/clk/qcom/clock-sc7280.c, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/qcom/clock-sc7280.c?h=main</id>
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<updated>2026-05-18T09:04:13Z</updated>
<entry>
<title>clk: qcom: sc7280: Add UFS clock support</title>
<updated>2026-05-18T09:04:13Z</updated>
<author>
<name>Balaji Selvanathan</name>
<email>balaji.selvanathan@oss.qualcomm.com</email>
</author>
<published>2026-04-27T09:26:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7e670b7d6e10e5e072dfe05f425e635acec2524c'/>
<id>urn:sha1:7e670b7d6e10e5e072dfe05f425e635acec2524c</id>
<content type='text'>
Add UFS clock support for sc7280 including register definitions,
rate configuration, and gate clocks.

Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Signed-off-by: Balaji Selvanathan &lt;balaji.selvanathan@oss.qualcomm.com&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Link: https://patch.msgid.link/20260427-ufs_clk-v2-5-36e10a7c0ef6@oss.qualcomm.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: sc7280: add missing SDCC1 clocks</title>
<updated>2026-04-27T10:38:44Z</updated>
<author>
<name>Ajit Singh</name>
<email>blfizzyy@gmail.com</email>
</author>
<published>2026-02-26T19:32:17Z</published>
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<id>urn:sha1:16a16b55ce5fd75097bc07e7c0503b59b5401a81</id>
<content type='text'>
Add GCC_SDCC1_AHB_CLK and GCC_SDCC1_APPS_CLK gate clocks.
Required on platforms where SDCC1 is used for eMMC.

Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=a3cc092196ef63570c8744c3ac88c3c6c67ab44b

Signed-off-by: Ajit Singh &lt;blfizzyy@gmail.com&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260226193217.82657-1-blfizzyy@gmail.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>drivers: clk: qcom: sc7280: Add USB3 PHY pipe clock</title>
<updated>2026-04-27T10:33:30Z</updated>
<author>
<name>Balaji Selvanathan</name>
<email>balaji.selvanathan@oss.qualcomm.com</email>
</author>
<published>2025-12-03T11:07:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c808ab5fed990e2aa8e4ca6a855db49a225edd64'/>
<id>urn:sha1:c808ab5fed990e2aa8e4ca6a855db49a225edd64</id>
<content type='text'>
Add support for GCC_USB3_PRIM_PHY_PIPE_CLK which is required by
the USB3 PHY on SC7280/QCM6490 platforms.

Signed-off-by: Balaji Selvanathan &lt;balaji.selvanathan@oss.qualcomm.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Link: https://patch.msgid.link/20251203110735.1959862-2-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk/qcom: sc7280: add more QUP clocks</title>
<updated>2026-01-14T15:25:09Z</updated>
<author>
<name>Casey Connolly</name>
<email>casey.connolly@linaro.org</email>
</author>
<published>2026-01-08T19:49:55Z</published>
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<id>urn:sha1:142df62cb68dae574632640682b9e035ff076720</id>
<content type='text'>
Add more clocks for UART2, i2c9 and a few others. This is enough to get
the rubikpi 3 working.

Link: https://patch.msgid.link/20260108195007.3156604-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk/qcom: sc7280: add uart5 and uart7 clocks</title>
<updated>2025-10-30T17:04:51Z</updated>
<author>
<name>Casey Connolly</name>
<email>casey.connolly@linaro.org</email>
</author>
<published>2025-07-14T13:13:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9887944c4fa44cab668626b8e9d07a18f41e4246'/>
<id>urn:sha1:9887944c4fa44cab668626b8e9d07a18f41e4246</id>
<content type='text'>
Allow us to power up UART7 so we can load the QUP firmware, this is used
for bluetooth on RB3 Gen 2 and possibly other boards.

Additionally add the UART5 clocks so we can adjust baud rate for UART

Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-5-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly &lt;kcxt@postmarketos.org&gt;
</content>
</entry>
<entry>
<title>clk/qcom: sc7280: Fix variable name of msm_clk_data</title>
<updated>2025-06-24T13:54:51Z</updated>
<author>
<name>Luca Weiss</name>
<email>luca.weiss@fairphone.com</email>
</author>
<published>2025-06-11T12:08:44Z</published>
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<id>urn:sha1:8c6481b7385726acfb2306d241304a89a9f3a6c4</id>
<content type='text'>
Update the variable name to sc7280_gcc_data as it's in the sc7280
driver.

Fixes: f50e7be6bb1 ("clk/qcom: add initial clock driver for sc7280")
Signed-off-by: Luca Weiss &lt;luca.weiss@fairphone.com&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20250611-qcom-clk-variable-names-v1-1-37615b74daad@fairphone.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk/qcom: sc7280: add missing UFS and MMC clocks</title>
<updated>2025-04-10T13:43:10Z</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-03-17T16:15:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2c1462e38b771c547a1f3ee8bbea5aa9d3719885'/>
<id>urn:sha1:2c1462e38b771c547a1f3ee8bbea5aa9d3719885</id>
<content type='text'>
These are all usually enabled, hence we don't (yet) bother configuring
their RCG src clocks.

Add them to remove the errors about missing clocks when the UFS and MMC
drivers probe.

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/r/20250317-sc7280-mmc-ufs-clocks-v1-2-38e05c16511b@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk/qcom: sc7280: add GENI, PCIe, and more USB clocks</title>
<updated>2025-03-17T15:12:23Z</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-03-14T15:31:21Z</published>
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<id>urn:sha1:1a28852467ac1296654d6d9d5cfedd65863cc035</id>
<content type='text'>
Add support for a bunch of new clocks, including PCIe, GENI (for all
peripherals used on the RB3 Gen 2), and some missing USB clocks.

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/r/20250314-sc7280-more-clocks-v1-3-ead54487c38e@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk/qcom: sc7280: add some debug data</title>
<updated>2025-03-17T15:12:20Z</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-03-14T15:31:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f305f33fad687d670c5be8debf6605489cb17aac'/>
<id>urn:sha1:f305f33fad687d670c5be8debf6605489cb17aac</id>
<content type='text'>
Dump a few PCIe and USB clocks

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/r/20250314-sc7280-more-clocks-v1-2-ead54487c38e@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>clk/qcom: bubble up qcom_gate_clk_en() errors</title>
<updated>2025-03-17T15:12:15Z</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-03-14T15:31:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7c5460afec3fd71c940a5e1a977655a267795f75'/>
<id>urn:sha1:7c5460afec3fd71c940a5e1a977655a267795f75</id>
<content type='text'>
If we try to enable a gate clock that doesn't exist, we used to just
fail silently. This may make sense for early bringup of some core
peripherals that we know are already enabled, but it only makes
debugging missing clocks more difficult.

Bubble up errors now that qcom_gate_clk_en() can return an error code to
catch any still-missing clocks and make it easier to find missing ones
as more complicated peripherals are enabled.

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/r/20250314-sc7280-more-clocks-v1-1-ead54487c38e@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
</entry>
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