u-boot.git/drivers/clk/qcom, branch v2025.10

clk: qcom: sm8650: add usb3 noc clk

2025-07-14T13:35:24Z

Commit [0] introduced, correctly, the bubble of qcom clock errors to make it easy to spot missing clocks in the platforms, and this is a case of that, add the GCC_CFG_NOC_USB3_PRIM_AXI_CLK clock to sm8650 clock pool. 0: 7c5460afec3f ("clk/qcom: bubble up qcom_gate_clk_en() errors") Signed-off-by: Rui Miguel Silva Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20250618093253.225929-1-rui.silva@linaro.org Signed-off-by: Casey Connolly

clk/qcom: sm8250: Fix variable name of msm_clk_data

2025-06-24T13:54:51Z

Update the variable name to sm8250_gcc_data as it's in the sm8250 driver. Fixes: dcd688229cb ("clk/qcom: add driver for sm8250 GCC") Signed-off-by: Luca Weiss Reviewed-by: Casey Connolly Reviewed-by: Sumit Garg Link: https://lore.kernel.org/r/20250611-qcom-clk-variable-names-v1-2-37615b74daad@fairphone.com Signed-off-by: Casey Connolly

clk/qcom: sc7280: Fix variable name of msm_clk_data

2025-06-24T13:54:51Z

Update the variable name to sc7280_gcc_data as it's in the sc7280 driver. Fixes: f50e7be6bb1 ("clk/qcom: add initial clock driver for sc7280") Signed-off-by: Luca Weiss Reviewed-by: Casey Connolly Reviewed-by: Sumit Garg Link: https://lore.kernel.org/r/20250611-qcom-clk-variable-names-v1-1-37615b74daad@fairphone.com Signed-off-by: Casey Connolly

clk/qcom: qcs615: Add GCC clock driver for QCS615

2025-06-24T13:54:51Z

Port Linux's gcc-qcs615.c driver to U-Boot for basic bring-up. Reviewed-by: Neil Armstrong Signed-off-by: Aswin Murugan Link: https://lore.kernel.org/r/20250521035324.1182833-4-aswin.murugan@oss.qualcomm.com Signed-off-by: Casey Connolly

clk/qcom: qcs8300: Add GCC clock driver for QCS8300

2025-06-24T13:54:03Z

* Port Linux's gcc-qcs8300.c driver to U-Boot for basic bring-up. * Enable QCS8300 clocks in qcom_defconfig. Reviewed-by: Casey Connolly Reviewed-by: Neil Armstrong Signed-off-by: Balaji Selvanathan Link: https://lore.kernel.org/r/20250529154931.1879976-4-quic_bselvana@quicinc.com Signed-off-by: Casey Connolly

clk/qcom: add initial clock driver for ipq5424

2025-06-23T16:50:21Z

Add initial set of clocks and resets for enabling U-Boot on ipq5424 based RDP platforms. Signed-off-by: Varadarajan Narayanan Reviewed-by: Casey Connolly Link: https://lore.kernel.org/r/20250304110105.2762124-5-quic_varada@quicinc.com Signed-off-by: Casey Connolly

clk: qcom: apq8016: Fix SDCC clock warnings

2025-06-02T16:20:16Z

As of commit dc8754e8e408 ("clk/qcom: apq8016: improve clk_enable logging") there are now warnings in the U-Boot console on DragonBoard 410c: apq8016_clk_enable: unknown clk id 122 apq8016_clk_enable: unknown clk id 123 apq8016_clk_enable: unknown clk id 124 apq8016_clk_enable: unknown clk id 125 This is because we don't implement enable() properly for the SDCC clocks. Currently they are being enabled as part of set_rate(). Fix this by moving the enable calls out of the apq8016_clk_init_sdc() function and convert them to the equivalent GATE_CLK_POLLED() definitions. Reviewed-by: Neil Armstrong Signed-off-by: Stephan Gerhold Reviewed-by: Sumit Garg Reviewed-by: Casey Connolly Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-6-fcc371c9e45f@linaro.org Signed-off-by: Casey Connolly

clk: qcom: apq8016: Convert GATE_CLK() to GATE_CLK_POLLED()

2025-06-02T16:20:15Z

Convert the usages of GATE_CLK() in clock-apq8016 to GATE_CLK_POLLED() to make sure that we poll the status when enabling clocks: - PRNG_AHB_CLK is a vote clock, so we poll a different register address. - The USB clocks are simple branches, so enable/poll is the same register. Reviewed-by: Neil Armstrong Signed-off-by: Stephan Gerhold Reviewed-by: Sumit Garg Reviewed-by: Casey Connolly Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-5-fcc371c9e45f@linaro.org Signed-off-by: Casey Connolly

clk: qcom: Allow polling for clock status in qcom_gate_clk_en()

2025-06-02T16:20:15Z

GATE_CLK() in its current state is unsafe: A simple write to the clock enable register does not guarantee that the clock is immediately running. Without polling the clock status, we may issue writes to registers before the necessary clocks start running. This doesn't seem to cause issues in U-Boot at the moment, but for example removing the CLK_OFF polling in TF-A for the SMMU clocks on DB410c reliably triggers an exception during boot. Make it possible to poll the branch clock status register, by adding a new GATE_CLK_POLLED() macro that takes the extra register address. Existing usages work just as before, without polling the clock status. Ideally all usages should be updated to specify the correct poll address in the future. The Qualcomm naming for these clocks is "branch" and not "gate", but let's keep the existing naming for now to avoid confusion until all others drivers have been converted. Reviewed-by: Neil Armstrong Signed-off-by: Stephan Gerhold Reviewed-by: Sumit Garg Reviewed-by: Casey Connolly Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-4-fcc371c9e45f@linaro.org Signed-off-by: Casey Connolly

clk: qcom: Use setbits_le32() for qcom_gate_clk_en()

2025-06-02T16:20:15Z

The other clock enable functions in clock-qcom.c use setbits_le32() to read/modify/write the enable registers. Use the same for qcom_gate_clk_en() to simplify the code a bit. Reviewed-by: Neil Armstrong Signed-off-by: Stephan Gerhold Reviewed-by: Sumit Garg Reviewed-by: Casey Connolly Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-3-fcc371c9e45f@linaro.org Signed-off-by: Casey Connolly