u-boot.git/drivers/clk/renesas, branch master

clk: renesas: rcar-cpg-lib: Convert to common field_{get, prep}() helpers

2026-07-08T19:29:18Z

Drop the driver-specific field_get() and field_prep() macros, in favor of the globally available variants from . Signed-off-by: Mikhail Kshevetskiy

clk: renesas: #undef field_{get, prep}() before definition

2026-07-08T19:29:18Z

Prepare for the advent of globally available common field_get() and field_prep() macros by undefining the symbols before defining local variants. This prevents redefinition warnings from the C preprocessor when introducing the common macros later. Signed-off-by: Mikhail Kshevetskiy

Kconfig: drivers: restyle remaining

2026-06-25T21:00:58Z

Restyle all Kconfigs for the rest of "drivers": Menu entries : no space left Menu attributes: 1 TAB Help text : 1 TAB + 2 spaces Replace '---help---' by 'help' Signed-off-by: Johan Jonker [trini: Add missing indentation on a few more multi-paragraph help texts] Signed-off-by: Tom Rini

clk: renesas: Add Renesas R-Car R8A78000 X5H CPG clock driver

2026-05-21T19:48:05Z

Add Renesas R-Car R8A78000 X5H CPG clock driver, which serves as a remap driver between DT clock IDs and SCMI clock IDs in case U-Boot runs on the Cortex-A, and as a trivial clock driver for RSIP. The R-Car X5H SCP firmware uses different SCMI clock IDs in different versions of the SCP firmware, which makes this remapping necessary. The SCMI base protocol version is updated for each new SCP firmware version, it is therefore possible to determine which SCP firmware version is running on the platform from the base protocol and then determine which remapping table to use for DT clock ID to SCMI clock ID remapping. Currently supported versions are SCP 4.28, 4.31, 4.32 . The DT clock ID to SCMI clock ID remap and call mechanism is a bit complex. The driver looks up the SCMI clock protocol device on probe and stores pointer to it in private data. On each clock request which has to be remapped, the device sequence ID of this SCMI clock protocol device is incremented by the remapped SCMI clock ID + 1 and used to look up matching clock device by sequence number. If the device is found, it is converted to clock, which can be used in regular clock operations. This look up has to be done because the SCMI clock driver registers a subdevice for each clock, and this look up is the only way to find the correct SCMI clock subdevice. Since the SCMI device and the clock subdevices are registered in the same function, we can depend on the device sequence numbers to be monotonically incrementing, with SCMI clock protocol device being sequence number N, the first SCMI clock subdevice being sequence number N+1 and so on. In case of RSIP, all clocks are already enabled by BootROM or early SoC initialization code, the driver therefore only acts as a stub. Signed-off-by: Marek Vasut

clk: renesas: Do not disable realtime modules on R8A77995 D3

2025-12-29T19:47:53Z

Later versions of the datasheet makes it clear D3 do not have any realtime module stop control registers (RMSTPCRx). Remove the manipulation of them from the module clock table to match this. Suggested-by: Marek Vasut Signed-off-by: Niklas Söderlund

clk: renesas: Do not enable MSTP4 extra modules on R8A77995 D3

2025-12-29T19:47:53Z

Since commit a2bd99549c61 ("clk: renesas: Tear clock controller down last before booting OS") enabling the module gated by bit 8 in MSTP4 prevents Linux from booting. The bits 8 and 7 of MSTP4 where only documented in early versions of the datasheet and have since been removed. To allow Linux to boot update the MSTP4 enable value to reflect the hardware default, 0x80. Suggested-by: Marek Vasut Signed-off-by: Niklas Söderlund

clk: renesas: Introduce temporary compound clock for SCP compatibility

2025-12-02T23:17:15Z

The current state of SCP on Renesas R-Car Gen5 is not yet final and is still missing full clock control, the clock control is exposed as separate enable/disable and rate controls. Temporarily introduce custom local compound clock, which are used as an adaptation layer between U-Boot clock tree and current state of SCP, and which bind two SCP clock into a single compound clock, which provides both enable/disable and rate controls. This is mainly meant to be used by SD/eMMC controller, to allow the driver to both turn its clock on and off, and also obtain the current clock rate. This is going to be removed once the SCP clock protocol solidifies. Signed-off-by: Marek Vasut

clk: renesas: Isolate R-Car Gen3 driver to Gen3, Gen4 and RZ/G2L

2025-11-07T16:40:42Z

Isolate Renesas R-Car Gen3 clock driver to R-Car Gen3 and Gen4 and RZ/G2L. The Renesas R-Car Gen5 uses SCMI clock protocol driver instead. This is a preparatory change for R-Car Gen5. No functional change. Signed-off-by: Marek Vasut

clk: renesas: Do not test unsigned variable to be less than 0

2025-08-06T14:52:27Z

In rcar_clk_set_rate64_div_table the unsigned variable 'value' is used to receive the return value from rcar_clk_get_table_val which returns an int and then attempts to test for being less than 0, which can never be true. Instead declare value as an int so the code can behave as expected. Also remove initial values from 'value' and 'div' as they are not needed. This issue was found by Smatch. Signed-off-by: Andrew Goodbody Reviewed-by: Marek Vasut

clk: renesas: Handle CLK_TYPE_GEN4_MDSEL in gen3_clk_get_rate64()

2025-06-18T13:08:52Z

Add support of CLK_TYPE_GEN4_MDSEL clock type to gen3_clk_get_rate64() function. In particular, this type of clock is used by Renesas R-Car Gen4 watchdog. It operates similarly to CLK_TYPE_GEN3_MDSEL clock. Signed-off-by: Shmuel Leib Melamud Reviewed-by: Mattijs Korpershoek Reviewed-by: Marek Vasut Reviewed-by: Stefan Roese