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<title>u-boot.git/drivers/clk/rockchip, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/rockchip?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/clk/rockchip?h=master'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2026-06-09T16:19:05Z</updated>
<entry>
<title>rockchip: clk: clk_rk3576: Add support for RK3576 GMAC 25MHz clock output</title>
<updated>2026-06-09T16:19:05Z</updated>
<author>
<name>Alexey Charkov</name>
<email>alchark@flipper.net</email>
</author>
<published>2026-05-04T13:45:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=957941943bdb7e48aa223737268c28a0ae2dcd6d'/>
<id>urn:sha1:957941943bdb7e48aa223737268c28a0ae2dcd6d</id>
<content type='text'>
Rockchip RK3576 SoC has two built-in GMACs which connect to external PHYs
via RGMII interface. The RGMII link can be clocked by either the PHY or
the SoC. When the SoC is the master, as is the case on the RK3576 EVB1,
the output clock needs to be configured in the CRU.

Add the respective logic for getting and setting the RGMII reference clock
output for both GMAC0 and GMAC1.

Signed-off-by: Alexey Charkov &lt;alchark@flipper.net&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>clk: rockchip: rk3576: Add CLK_REF_USB3OTGx support</title>
<updated>2026-06-08T13:21:52Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2026-03-10T01:02:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c97c7d5caadc6d2d87764162171d1a1bdc206803'/>
<id>urn:sha1:c97c7d5caadc6d2d87764162171d1a1bdc206803</id>
<content type='text'>
The CLK_REF_USB3OTGx clocks are used as reference clocks for the two
DWC3 blocks.

Add simple support to get rate of CLK_REF_USB3OTGx clocks to fix
reference clock period configuration.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>clk: rockchip: rk3528: Add CLK_REF_USB3OTG support</title>
<updated>2026-06-08T13:21:52Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2026-03-10T01:00:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a9c1f2af7178ef6b74053ef427ea68b489895e98'/>
<id>urn:sha1:a9c1f2af7178ef6b74053ef427ea68b489895e98</id>
<content type='text'>
The CLK_REF_USB3OTG clock is used as reference clock for the DWC3 block.

Add simple support to get rate of CLK_REF_USB3OTG clock to fix reference
clock period configuration.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-rockchip-20260309' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next</title>
<updated>2026-03-10T16:07:04Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-03-10T14:17:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d93a63acfe701aa07c9223ec454164c88e7eb43d'/>
<id>urn:sha1:d93a63acfe701aa07c9223ec454164c88e7eb43d</id>
<content type='text'>
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/29452

- New SoC support: RK3506, RK3582;
- New Board support: RK3528 FriendlyElec NanoPi Zero2;
- Other fixes
</content>
</entry>
<entry>
<title>clk: rockchip: Add support for RK3506</title>
<updated>2026-03-10T16:07:03Z</updated>
<author>
<name>Finley Xiao</name>
<email>finley.xiao@rock-chips.com</email>
</author>
<published>2026-01-31T23:38:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fbf72dce915a9bd217ba36e3186b784ed6b55fa7'/>
<id>urn:sha1:fbf72dce915a9bd217ba36e3186b784ed6b55fa7</id>
<content type='text'>
Add clock driver for RK3506.

Imported from vendor U-Boot linux-6.1-stan-rkr6 tag with minor
adjustments and fixes for mainline.

Signed-off-by: Finley Xiao &lt;finley.xiao@rock-chips.com&gt;
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>treewide: Clean up DECLARE_GLOBAL_DATA_PTR usage</title>
<updated>2026-02-17T19:50:22Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2026-02-09T01:30:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f90b1e715f8abe41b0875752eb184f46032ff11'/>
<id>urn:sha1:0f90b1e715f8abe41b0875752eb184f46032ff11</id>
<content type='text'>
Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.

Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.

Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt; #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal &lt;anshuld@ti.com&gt; #TI boards
Acked-by: Yao Zi &lt;me@ziyao.cc&gt; #TH1520
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>clk: px30: Allow use of GPU and WIFI_PMU in assigned-clocks</title>
<updated>2025-11-01T13:17:42Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-08-31T16:49:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=70a2168569fa5f96dc6f29291697ed1bab08e340'/>
<id>urn:sha1:70a2168569fa5f96dc6f29291697ed1bab08e340</id>
<content type='text'>
Add dummy implementation of set_rate for SCLK_GPU and SCLK_WIFI_PMU to
allow use of dts/upstream assigned-clocks in cru and pmucru nodes.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: clk: clk_rk3528: Add dummy CLK_REF_PCIE_INNER_PHY support</title>
<updated>2025-08-30T15:26:08Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-07-30T23:52:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=281c66f39b0e6b3b520976ad0535939141f148b8'/>
<id>urn:sha1:281c66f39b0e6b3b520976ad0535939141f148b8</id>
<content type='text'>
Add dummy support for the CLK_REF_PCIE_INNER_PHY clock to allow probe of
the phy-rockchip-naneng-combphy driver on RK3528.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: clk: clk_rk3576: Add dummy CLK_REF_PCIEx_PHY support</title>
<updated>2025-08-30T15:01:44Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-08-01T20:43:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2a6039a20994c192edb6786fa97714180bd663cf'/>
<id>urn:sha1:2a6039a20994c192edb6786fa97714180bd663cf</id>
<content type='text'>
Add dummy support for the CLK_REF_PCIEx_PHY clocks to allow probe of the
phy-rockchip-naneng-combphy driver on RK3576.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>clk: rockchip: Add rk3576 clk support</title>
<updated>2025-04-23T14:12:05Z</updated>
<author>
<name>Elaine Zhang</name>
<email>zhangqing@rock-chips.com</email>
</author>
<published>2025-04-15T21:51:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3919310b37ec0394d944de6d3980254cd8ed3035'/>
<id>urn:sha1:3919310b37ec0394d944de6d3980254cd8ed3035</id>
<content type='text'>
Add clock driver support for Rockchip RK3576 SoC.

Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
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