u-boot.git/drivers/clk/rockchip, branch v2018.01

rockchip: rk3128: add clock driver

2017-11-30T21:55:26Z

Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich

rockchip: clk: rk3399: change extract_bits to bitfield_extract

2017-11-25T23:39:08Z

The RK3399 clk driver still has a left-over use of extract_bits, which can be replaced by using bitfield_extract from include/bitfield.h. This rewrites the invocation to use the shared function. Signed-off-by: Philipp Tomsich

rockchip: clock: update sysreset driver binding

2017-11-21T22:57:23Z

Using priv for new sysreset driver binding. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich

rockchip: rk3399: init CPU clock when rkclk_init()

2017-11-01T10:21:32Z

Init the CPU and its buses to speed up the boot time. Move rkclk_init() to a place after rk3399_configure_cpu has defined at the same time, or else there will be a warning. Signed-off-by: Kever Yang Reviewed-by: Simon Glass Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich

treewide: replace with error() with pr_err()

2017-10-04T15:59:44Z

U-Boot widely uses error() as a bit noisier variant of printf(). This macro causes name conflict with the following line in include/linux/compiler-gcc.h: # define __compiletime_error(message) __attribute__((error(message))) This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().) Let's convert error() into now treewide-available pr_err(). Done with the help of Coccinelle, excluing tools/ directory. The semantic patch I used is as follows: // @@@@ -error +pr_err (...) // Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass [trini: Re-run Coccinelle] Signed-off-by: Tom Rini

rockchip: rk322x: fix pd_bus hclk/pclk

2017-09-30T22:33:32Z

The pd_bus hclk/pclk source is pd_bus aclk, not the PLL. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich

rockchip: clk: fix typo in rk322x clock driver

2017-09-30T22:33:32Z

Fix typo RK322X/RK3036 in rk322x clock driver. Signed-off-by: Kever Yang Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich

rockchip: clk: Add rk3399 SARADC clock support

2017-09-30T22:33:30Z

The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 8-bits width. Signed-off-by: David Wu Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich

rockchip: clk: Add rk3368 SARADC clock support

2017-09-30T22:33:30Z

rockchip: clk: Add rk3328 SARADC clock support

2017-09-30T22:33:30Z

The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 10-bits width. Signed-off-by: David Wu Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich