u-boot.git/drivers/clk/starfive, branch next

dts: starfive: Switch to using upstream DT

2024-12-18T05:19:15+00:00

Enable OF_UPSTREAM to use upstream DT and add starfive/ prefix to
the DEFAULT_DEVICE_TREE. Rename jh7110-starfive-visionfive-2-u-boot.dtsi
to jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi and set the v1.3b
device tree as the default device tree.

Drop redundant DT files from arch/riscv/dts/ and redundant clock and
reset definitions from include/dt-bindings/.

Since the old clock definitions is a little different from those in
upstream Linux, update the clock definitions in clock drivers
accordingly.

Tested-by: Anand Moon 
Tested-by: E Shattow 
Acked-by: Sumit Garg 
Signed-off-by: Hal Feng

drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

2024-10-11T17:44:48+00:00

Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20T19:35:03+00:00

As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman 
Signed-off-by: Tom Rini

Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""

2024-05-19T14:16:36+00:00

When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman 
Signed-off-by: Tom Rini

clk: Remove and add needed includes

2024-05-07T14:00:41+00:00

Remove  from this driver directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini

clk: starfive: jh7110: Add watchdog clocks

2023-12-05T08:40:16+00:00

Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110
watchdog device.

Signed-off-by: Chanho Park 
Reviewed-by: Leo Yu-Chi Liang

clk: starfive: jh7110: Add security clocks

2023-11-02T09:45:53+00:00

Add STGCLK_SEC_HCLK and STGCLK_SEC_MISCAHB clocks for JH7110 TRNG
device.

Signed-off-by: Chanho Park 
Reviewed-by: Leo Yu-Chi Liang

clk: starfive: jh7110: Add of_xlate ops and macros for clock id conversion

2023-07-24T05:21:16+00:00

Modify the drivers to add of_xlate ops and transform clock id.

Signed-off-by: Xingyu Wu 
Signed-off-by: Hal Feng 
Reviewed-by: Torsten Duwe 
Reviewed-by: Leo Yu-Chi Liang

clk: starfive: jh7110: Separate the PLL driver

2023-07-24T05:20:44+00:00

Drop the PLL part in SYSCRG driver and separate to be a single
PLL driver of which the compatible is "starfive,jh7110-pll".

Signed-off-by: Xingyu Wu 
Signed-off-by: Hal Feng 
Reviewed-by: Torsten Duwe 
Reviewed-by: Leo Yu-Chi Liang

clk: starfive: pll: Fix to use postdiv1_mask

2023-07-06T09:28:08+00:00

There is a problem that the rates of PLL0 and PLL1 are set incorrectly
because the postdiv1_mask value is incorrectly entered when setting
the pll clk reg. Modify postdiv1's mask value to be put correctly.

Signed-off-by: Hoegeun Kwon 
Reviewed-by: Minkyu Kang