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<title>u-boot.git/drivers/clk/sunxi, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>clk: sunxi: Add MBUS Master Clock Gating Register</title>
<updated>2026-02-03T20:45:14+00:00</updated>
<author>
<name>Richard Genoud</name>
<email>richard.genoud@bootlin.com</email>
</author>
<published>2026-01-23T11:44:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4a611a82e5158d5789cb7bbf6feabaadc9d6b796'/>
<id>4a611a82e5158d5789cb7bbf6feabaadc9d6b796</id>
<content type='text'>
Add MBUS Master Clock Gating Register for H6 and H616

For H6/H616, the NAND controller needs the MBUS NAND clock along with
CLK_NAND0/1 and CLK_BUS_NAND.

The bit locations are from H6/H616 User Manuals.

Signed-off-by: Richard Genoud &lt;richard.genoud@bootlin.com&gt;
Signed-off-by: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
</content>
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<pre>
Add MBUS Master Clock Gating Register for H6 and H616

For H6/H616, the NAND controller needs the MBUS NAND clock along with
CLK_NAND0/1 and CLK_BUS_NAND.

The bit locations are from H6/H616 User Manuals.

Signed-off-by: Richard Genoud &lt;richard.genoud@bootlin.com&gt;
Signed-off-by: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Add support for the A523 -R CCU</title>
<updated>2025-07-27T21:57:35+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2024-09-13T08:01:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d508d995d1187c3811ee4746d12f9dc106744756'/>
<id>d508d995d1187c3811ee4746d12f9dc106744756</id>
<content type='text'>
Add a clock driver for the PRCM clock controller on the Allwinner A523
family of SoCs, often also used with an "r" prefix or suffix.
This just describes the clock gates and reset lines for the few devices
that we would need, most prominently the R_I2C device for the PMIC.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a clock driver for the PRCM clock controller on the Allwinner A523
family of SoCs, often also used with an "r" prefix or suffix.
This just describes the clock gates and reset lines for the few devices
that we would need, most prominently the R_I2C device for the PMIC.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Add support for the A523 CCU</title>
<updated>2025-07-27T21:57:35+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2024-09-09T00:47:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1d0b1d46ccfdd5fef57a4232966c905a04e21840'/>
<id>1d0b1d46ccfdd5fef57a4232966c905a04e21840</id>
<content type='text'>
Add a clock driver for the main clock controller on the Allwinner A523
family of SoCs.
As usual, this just describes the clock gates and reset lines for the
few device that U-Boot cares about: USB, Ethernet, MMC, I2C, SPI.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a clock driver for the main clock controller on the Allwinner A523
family of SoCs.
As usual, this just describes the clock gates and reset lines for the
few device that U-Boot cares about: USB, Ethernet, MMC, I2C, SPI.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Add support for the A100/A133 CCU</title>
<updated>2025-03-27T00:26:35+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2023-10-25T23:28:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7d1936aef7c4046a89660b8f5763bde592946840'/>
<id>7d1936aef7c4046a89660b8f5763bde592946840</id>
<content type='text'>
The Allwinner A100 SoC has been around for a while, and has now seemingly
been replaced with its close sibling A133.

Add support for the CCU, as far as used by U-Boot proper. Linux has some
basic (clock and pinctrl) support for a while, so we can already use the
existing binding headers.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Acked-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Allwinner A100 SoC has been around for a while, and has now seemingly
been replaced with its close sibling A133.

Add support for the CCU, as far as used by U-Boot proper. Linux has some
basic (clock and pinctrl) support for a while, so we can already use the
existing binding headers.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Acked-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: a80: Fix reset description</title>
<updated>2024-10-09T23:23:41+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2024-02-12T23:13:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7db2f11eb041043d43fe4dd1879d567d33759ee0'/>
<id>7db2f11eb041043d43fe4dd1879d567d33759ee0</id>
<content type='text'>
Clock gates and reset lines share a common structure in the sunxi clock
driver descriptions, but use different flags to tell them apart.

The description of the Allwinner A80 MMC clock reset lines was
erroneously using the "GATE" macro, which made the reset driver ignore
that entry, complaining with:
sunxi_set_reset: (RST-reset:#0) unhandled

Change that to the correct "RESET" macro, to make the reset driver
happy.

Fixes e0c7ce7e52b7 ("sunxi: clk: A80: add MMC clock support")
Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Clock gates and reset lines share a common structure in the sunxi clock
driver descriptions, but use different flags to tell them apart.

The description of the Allwinner A80 MMC clock reset lines was
erroneously using the "GATE" macro, which made the reset driver ignore
that entry, complaining with:
sunxi_set_reset: (RST-reset:#0) unhandled

Change that to the correct "RESET" macro, to make the reset driver
happy.

Fixes e0c7ce7e52b7 ("sunxi: clk: A80: add MMC clock support")
Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: add EMAC and EPHY clocks and resets for the V3s SoC</title>
<updated>2024-07-15T21:18:16+00:00</updated>
<author>
<name>Michael Walle</name>
<email>mwalle@kernel.org</email>
</author>
<published>2024-05-13T20:56:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f06757324b2f2b0e062113a51f517a5361e6603c'/>
<id>f06757324b2f2b0e062113a51f517a5361e6603c</id>
<content type='text'>
Add the clock gate registers as well as the reset register bits for the
EMAC and EPHY for the V3s. These are needed by the sun8i network driver.

Signed-off-by: Michael Walle &lt;mwalle@kernel.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the clock gate registers as well as the reset register bits for the
EMAC and EPHY for the V3s. These are needed by the sun8i network driver.

Signed-off-by: Michael Walle &lt;mwalle@kernel.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"</title>
<updated>2024-05-20T19:35:03+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-20T19:35:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=03de305ec48b0bb28554372abb40ccd46dbe0bf9'/>
<id>03de305ec48b0bb28554372abb40ccd46dbe0bf9</id>
<content type='text'>
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""</title>
<updated>2024-05-19T14:16:36+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-19T02:20:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d678a59d2d719da9e807495b4b021501f2836ca5'/>
<id>d678a59d2d719da9e807495b4b021501f2836ca5</id>
<content type='text'>
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Remove &lt;common.h&gt; and add needed includes</title>
<updated>2024-05-07T14:00:41+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-02T01:30:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=92bb2cd42aee1d1bd3d7ff236e5874f3450d1a35'/>
<id>92bb2cd42aee1d1bd3d7ff236e5874f3450d1a35</id>
<content type='text'>
Remove &lt;common.h&gt; from this driver directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove &lt;common.h&gt; from this driver directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sunxi: add Allwinner R528/T113 SoC support</title>
<updated>2023-10-22T22:41:52+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2022-09-06T14:59:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=95168d77d391b1464af9f99ca44a2e46f309c32e'/>
<id>95168d77d391b1464af9f99ca44a2e46f309c32e</id>
<content type='text'>
This adds the remaining code bits to teach U-Boot about Allwinner's
newest SoC generation. This was introduced with the RISC-V based
Allwinner D1 SoC, which actually shares a die with the ARM cores versions
called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM).

This adds the new Kconfig stanza, using the two newly introduced symbols
for the new SoC generation and pincontroller. It also adds the new symbols
to the relavent code places, to set all the hardcoded bits directly.

We need one DT override:
The ARM core version of the DT specifies the CPUX watchdog as
"reserved", which means it won't be recognised by U-Boot. Override this
in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog,
so that the generic reset driver will work.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds the remaining code bits to teach U-Boot about Allwinner's
newest SoC generation. This was introduced with the RISC-V based
Allwinner D1 SoC, which actually shares a die with the ARM cores versions
called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM).

This adds the new Kconfig stanza, using the two newly introduced symbols
for the new SoC generation and pincontroller. It also adds the new symbols
to the relavent code places, to set all the hardcoded bits directly.

We need one DT override:
The ARM core version of the DT specifies the CPUX watchdog as
"reserved", which means it won't be recognised by U-Boot. Override this
in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog,
so that the generic reset driver will work.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
