Markus Schneider-Pargmann (TI.com) <msp@baylibre.com> says: This series cleans up the direct dependency of ARCH_OMAP2PLUS to compile ti/clk.c which holds common functions for other clock drivers. It creates its own config symbols for these common functions and for the omap-cm driver as well. The omap-cm driver config symbol is added as default enabled. Link: https://lore.kernel.org/r/20251128-topic-am33-clk-regmap-dep-v2026-01-v2-0-451b4f4e7e85@baylibre.com/
Add a Kconfig symbol for this stub driver to avoid clock dependencies on an architecture symbol. Enable it by default. Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Create a new symbol for the common clock functions used by some of the omap2plus clock drivers. These drivers now select this new symbol when they need the functions. Note these common functions are not ARCH_OMAP2PLUS specific. Note that the common functions are using regmap, so select it here. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
Attempting to build with "allyesconfig" means that we try and build all available options for the sandbox platforms. Doing so exposes that the drivers under drivers/clk/ti/ can only be compiled or linked on ARCH_OMAP2PLUS platforms as some drivers require platform specific headers while other drivers depend on these first drivers to link. Express those requirements in Kconfig as well. Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
A few clock drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <trini@konsulko.com>
Add "in SPL" to the SPL related driver help texts. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Currently in j721e_init.c we check which firewalls to remove using the board configuration (e.g CONFIG_TARGET_J721E_R5_EVM). We do this as J721e and J7200 have different IP and firewalls but use the same SoC definition (SOC_K3_J721E) even though they are different SoCs. The idea was they would be similar enough that they both could use the same SoC config to help with common code sharing. Board checks would then be used differentiate. This has grown far too messy to maintain any more, especially now that there is more than one board using J721e (EVM, SK, Beagle AI64). As differentiation is done based on board, every one of these boards would have to have checks added for them. Instead let's split J7200 support out from J721e like how normal new SoC support is done. This patch touches several subsystems and could not be split much better as when we add SOC_K3_J7200 we want to make use of it in all spots that once used the combined SOC_K3_J721E so we can turn off SOC_K3_J721E when building for J7200 boards. Signed-off-by: Andrew Davis <afd@ti.com>
Re-use j784s4 clocks and power domains for j742s2 family of device. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Based on the recommendation from HW team make modifications to the sequence for more robustness. - Unlock the PLL registers - Enable external bypass - Disable the PLL - Program pllm and pllf - Program Ref divider - Enable other PLL controls like DSM_EN, DAC_EN,etc - Enable calibration if available - Enable PLL - Wait for PLL lock and Calibration lock - Remove external bypass Re-write the full sequence from scratch as the previous sequence was way off and keep it in a single commit for bisectability. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
base is more appropriate for the usage as the variable stores the base address and seems more accurate w.r.t reg. Change reg to base. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>