u-boot.git/drivers/clk, branch master

clk: scmi: Fix protocol version fetch for non-CCF platforms

2026-04-09T02:14:19+00:00

The SCMI clock protocol version was only being fetched when CLK_CCF
was enabled. On non-CCF platforms, the probe function returned early
without fetching the version, leaving priv->version as 0.

This caused issues because code paths like scmi_clk_gate() and
scmi_clk_get_permissions() depend on priv->version to determine
which protocol message format to use, even in non-CCF mode.

Fix this by moving the scmi_generic_protocol_version() call before
the CLK_CCF check, ensuring the version is fetched for both CCF and
non-CCF platforms.

Tested on am62lx_evm.

Fixes: ae7e0330ce22 ("clk: scmi: add compatibility with clock protocol 2.0")
Signed-off-by: Kamlesh Gurudasani 
Signed-off-by: Peng Fan

Merge tag 'mediatek-for-master-2026-04-07' of https://source.denx.de/u-boot/custodians/u-boot-mediatek

2026-04-07T19:52:01+00:00

This is the first wave of MediaTek changes for this merge window. We
also expect to be sending another decent-sized pull request later for
the backlog of patches that are currently waiting on dependencies or
need little more time for review.

* Fixes for cargo-culted issues in mach-mediatek init.c files.
* Some consistency cleanups of recently added Genio boards (510/700/1200).
* Some pinctrl improvements to support newer MediaTek SOCs (mt8189 compatible).
* New devicetree and config for Genio 520/720 EVK boards (can boot to eMMC or SD).
* New CPU-specific functions to read vendor-specific CPU info at runtime.

global: Correct duplicate U_BOOT_DRIVER entry names

2026-04-07T17:32:56+00:00

The U_BOOT_DRIVER macro creates a list of drivers used at link time, and
all entries here must be unique. This in turn means that all entries in
the code should also be unique in order to not lead to build failures
later with unexpected build combinations. Typically, the problem we have
here is when a driver is obviously based on another driver and didn't
update this particular field and so while the name field reflects
something unique the linker entry itself is not. In a few places this
provides a more suitable string name as well, however.

Reviewed-by: Marek Vasut 
Reviewed-by: Svyatoslav Ryhel  # Tegra
Reviewed-by: Peter Robinson 
Reviewed-by: Heiko Schocher 
Reviewed-by: Simon Glass 
Signed-off-by: Tom Rini

clk: mediatek: mt8189: add some VLP clocks

2026-04-07T15:56:23+00:00

Add some VLP clocks needed by the PMIC on MT8189 and similar SoCs.

Reviewed-by: Julien Stephan 
Link: https://patch.msgid.link/20260323-mtk-mt8391-initial-support-v3-1-19dd92f4543f@baylibre.com
Signed-off-by: David Lechner

Merge branch 'next'

2026-04-06T18:16:57+00:00

clk: Add missing dependency for SANDBOX_CLK_CCF

2026-04-03T19:42:49+00:00

In order to build SANDBOX_CLK_CCF we need for CLK_CCF to be enabled, add
that as a select similar to other drivers.

Signed-off-by: Tom Rini

core: Rework REGMAP symbols implementation

2026-03-30T22:59:35+00:00

As exposed by "make randconfig", we have an issue with the dependencies
for REGMAP (and xPL variants). As this is a library function, it should
always be selected and not depended on by other functionality. This is
largely done correctly today, so just correct the few outliers.

Acked-by: Anshul Dalal 
Signed-off-by: Tom Rini

clk: mediatek: mt7623: fix pericfg priv_auto size

2026-03-24T17:32:02+00:00

Change the pericfg priv_auto size to mtk_clk_priv. The driver is
registered using mtk_common_clk_infrasys_init() which expect that
struct.

The old value of struct mtk_cg_priv was larger, so there was no issue
out of bounds access.

Also replace tab with space to be consistent with the surrounding code.

Reported-by: Julien Stephan 
Closes: https://lore.kernel.org/u-boot/CAEHHSvYMiCZ4jAXp6jEhg6AhZ5Dv3_Ak-8H1mT7S2FPD3_X7dw@mail.gmail.com/
Reviewed-by: Julien Stephan 
Link: https://patch.msgid.link/20260313-clk-mtk-fix-priv-auto-size-v1-1-bc649e1b301a@baylibre.com
Signed-off-by: David Lechner

clk: mediatek: remove CLK_PARENT_XTAL

2026-03-24T16:04:24+00:00

Remove the CLK_PARENT_XTAL flag and related code. These have no more
users.

Reviewed-by: Julien Stephan 
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-16-66175ca8f637@baylibre.com
Signed-off-by: David Lechner

clk: mediatek: mt8518: convert CLK_XTAL to CLK_PAD_CLK26M

2026-03-24T16:04:21+00:00

Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan 
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-15-66175ca8f637@baylibre.com
Signed-off-by: David Lechner