u-boot.git/drivers/clk, branch v2016.07-rc1

Merge http://git.denx.de/u-boot-samsung

2016-06-06T17:39:43Z

Signed-off-by: Tom Rini Conflicts: configs/peach-pi_defconfig configs/peach-pit_defconfig

Merge git://git.denx.de/u-boot-dm

2016-05-28T00:34:12Z

For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work. Signed-off-by: Tom Rini Conflicts: lib/efi_loader/efi_disk.c Modified: configs/odroid-c2_defconfig

rockchip: rk3288: Add clock support for the gmac ethernet interface

2016-05-27T15:00:48Z

Setup the clocks for the gmac ethernet interface. This assumes the mac clock is fed by an external clock which is common on RK3288 based devices. Signed-off-by: Sjoerd Simons Reviewed-by: Simon Glass

Rename reset to sysreset

2016-05-27T02:48:31Z

The current reset API implements a method to reset the entire system. In the near future, I'd like to introduce code that implements the device tree reset bindings; i.e. the equivalent of the Linux kernel's reset API. This controls resets to individual HW blocks or external chips with reset signals. It doesn't make sense to merge the two APIs into one since they have different semantic purposes. Resolve the naming conflict by renaming the existing reset API to sysreset instead, so the new reset API can be called just reset. Signed-off-by: Stephen Warren Acked-by: Simon Glass

clk: uniphier: add Media I/O clock driver support for PH1-LD11

2016-05-25T15:37:13Z

Signed-off-by: Masahiro Yamada

clk: exynos: add clock driver for Exynos7420 Soc

2016-05-25T01:00:18Z

Add a clock driver for Exynos7420 SoC. There are about 25 clock controller blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks are added in this initial version of the driver. Cc: Minkyu Kang Cc: Simon Glass Signed-off-by: Thomas Abraham Reviewed-by: Simon Glass Signed-off-by: Minkyu Kang

clk: uniphier: add Media I/O clock driver support for PH1-LD20

2016-04-24T00:54:10Z

PH1-LD20 needs this for its SD card controller. Signed-off-by: Masahiro Yamada

clk: uniphier: use devm_get_addr() to get base address

2016-03-31T15:17:08Z

Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.) Signed-off-by: Masahiro Yamada

clk: uniphier: add Media I/O clock driver for UniPhier SoCs

2016-02-14T07:36:13Z

This is the initial commit for the UniPhier clock drivers. Currently, only the Media I/O clock is supported. Signed-off-by: Masahiro Yamada

drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.

2016-02-01T21:14:00Z

PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers and dividers capable of supplying clock to various controllers on or off-chip. Signed-off-by: Purna Chandra Mandal Reviewed-by: Simon Glass Reviewed-by: Daniel Schwierzeck