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<title>u-boot.git/drivers/clk, branch v2016.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-atmel</title>
<updated>2016-08-15T21:31:23+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-08-15T21:31:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0fcb9f07a1d086fc6951c08d2fc1cf6048bd54e2'/>
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<entry>
<title>clk: at91: Add clock driver</title>
<updated>2016-08-15T20:12:00+00:00</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2016-07-20T09:55:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e5935c04e891abb38a92a893f3457cdf304ef4f'/>
<id>9e5935c04e891abb38a92a893f3457cdf304ef4f</id>
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The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>clock: add Tegra186 clock driver</title>
<updated>2016-08-15T17:26:13+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-08-08T17:28:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d9fd7008f48ba3361133e3b901322a724fd2aced'/>
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In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually
any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
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<pre>
In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually
any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>rockchip: remove log2 reimplementation from clock drivers</title>
<updated>2016-08-06T00:07:07+00:00</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2016-07-22T21:51:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=abd0128eb12232948c6b7d3ad88132bb2d4897f8'/>
<id>abd0128eb12232948c6b7d3ad88132bb2d4897f8</id>
<content type='text'>
The already available ilog2 function does exactly the same in the common
case than the log2 function the current clock-driver reimplement.
So, simply move to that one.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
The already available ilog2 function does exactly the same in the common
case than the log2 function the current clock-driver reimplement.
So, simply move to that one.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>clock: rk3399: add support for dwmmc 400K</title>
<updated>2016-08-06T00:02:51+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2016-08-04T03:44:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fd4b2dc05996dad7680442ed574614d3db048f86'/>
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<content type='text'>
MMC core will use 400KHz for card initialize first and then switch to
higher frequency like 50MHz, we need to support both 400KHz and about
50MHz for dwmmc controller.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
MMC core will use 400KHz for card initialize first and then switch to
higher frequency like 50MHz, we need to support both 400KHz and about
50MHz for dwmmc controller.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</entry>
<entry>
<title>move: rockchip: move clock drivers into a subdirectory</title>
<updated>2016-08-05T23:56:08+00:00</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2016-07-29T12:47:21+00:00</published>
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<id>aff8795c01c39318eb07b4bf0cd7f170ff67d591</id>
<content type='text'>
With the number of Rockchip clock drivers increasing, don't clutter up
the core drivers/clk directory with them and instead move them out of
the way into a separate subdirectory.

Suggested-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Updated for rk3399:
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
With the number of Rockchip clock drivers increasing, don't clutter up
the core drivers/clk directory with them and instead move them out of
the way into a separate subdirectory.

Suggested-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Updated for rk3399:
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</entry>
<entry>
<title>rk3399: add basic soc driver</title>
<updated>2016-08-05T23:56:07+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2016-07-29T02:35:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b0b3c86521e0fe4cca3676adfc0b937d77456f9e'/>
<id>b0b3c86521e0fe4cca3676adfc0b937d77456f9e</id>
<content type='text'>
This patch add driver for:
- clock driver including set_rate for cpu, mmc, vop, I2C.
- sysreset driver
- grf syscon driver

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
This patch add driver for:
- clock driver including set_rate for cpu, mmc, vop, I2C.
- sysreset driver
- grf syscon driver

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>rockchip: Use rockchip_get_clk() to obtain the SoC clock</title>
<updated>2016-07-26T02:46:45+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-07-17T21:23:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c3aad6f65b3fb574e1a73c686d8793dee00c5819'/>
<id>c3aad6f65b3fb574e1a73c686d8793dee00c5819</id>
<content type='text'>
The current code picks the first available clock. In U-Boot proper this is
the oscillator device, not the SoC clock device. As a result the HDMI display
does not work.

Fix this by calling rockchip_get_clk() instead.

Fixes: 135aa950 (clk: convert API to match reset/mailbox style)
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Anatolij Gustschin &lt;agust@denx.de&gt;
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<pre>
The current code picks the first available clock. In U-Boot proper this is
the oscillator device, not the SoC clock device. As a result the HDMI display
does not work.

Fix this by calling rockchip_get_clk() instead.

Fixes: 135aa950 (clk: convert API to match reset/mailbox style)
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>rockchip: rk3288: fix FREF_MIN_HZ constant</title>
<updated>2016-07-26T02:44:20+00:00</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2016-07-15T22:17:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c3f03ffbe31ae886f0eb670edf47fc208d667c19'/>
<id>c3f03ffbe31ae886f0eb670edf47fc208d667c19</id>
<content type='text'>
According to the TRM the minimum FREF frequency is 269kHz not MHz.
Adapt the constant accordingly.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
According to the TRM the minimum FREF frequency is 269kHz not MHz.
Adapt the constant accordingly.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cosmetic: rockchip: rk3288: rename rkclk_configure_cpu</title>
<updated>2016-07-26T02:44:20+00:00</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2016-07-15T22:17:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b339b5dbca4c776a4c138b852082fad2df826410'/>
<id>b339b5dbca4c776a4c138b852082fad2df826410</id>
<content type='text'>
The function is very specific to the rk3288 in its arguments
referencing the rk3288 cru and grf and every other rockchip soc
has differing cru and grf registers. So make that function naming
explicit.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The function is very specific to the rk3288 in its arguments
referencing the rk3288 cru and grf and every other rockchip soc
has differing cru and grf registers. So make that function naming
explicit.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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