u-boot.git/drivers/clk, branch v2018.03

clk: renesas: Add R8A77965 M3N entries

2018-03-05T09:59:37+00:00

Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu

rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL

2018-02-24T17:50:03+00:00

The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.

In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.

Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.

References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()")
Signed-off-by: Philipp Tomsich 
Tested-by: Klaus Goger

rockchip: clk: rk3368: handle clk_enable requests for GMAC

2018-02-24T17:46:45+00:00

Since commit ba1f96672522 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3368 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.

This change extends the RK3368 clk driver to:
(a) provide a enable op
(b) signals success to the caller when the clocks for the GMAC are
    enabled (no actual action is necessary as the gates are open
    after reset)

References: commit ba1f96672522 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich 
Tested-by: Klaus Goger

rockchip: clk: rk3399: handle clk_enable requests for GMAC

2018-02-24T17:46:45+00:00

Since commit ba1f96672522 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3399 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.

This change extends the enable-op of the rk3399 clk driver to signal
success to the caller when the clocks for the GMAC are enabled.

References: commit ba1f96672522 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich 
Tested-by: Klaus Goger

clk: rmobile: Assure SD-IF clock are configured correctly

2018-02-16T15:43:09+00:00

The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate()
implementation in the clock driver does not set the SD-IF divider. Fix it.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu

clk: clk_stm32: Add .set_rate callback

2018-01-29T17:48:33+00:00

Since 'commit f4fcba5c5baa ("clk: implement clk_set_defaults()")'
STM32F4 family board can't boot.

Above patch calls clk_set_rate() for all nodes with assigned-clock-rates
property. Clock driver for STM32F family doesn't implement .set_rate
callback which make clk_set_defaults() exit on error and prevent board
to boot.

Fixes: f4fcba5c5baa ("clk: implement clk_set_defaults()")
Signed-off-by: Patrice Chotard

Merge git://git.denx.de/u-boot-rockchip

2018-01-28T18:56:19+00:00

rockchip: clk: guard set_parent implementations against OF_PLATDATA

2018-01-28T16:12:39+00:00

The set_parent implementations do not make sense when OF_PLATDATA is
enabled.  We guard these against OF_PLATDATA and don't populate the
set_parent-op when this is the case.

Signed-off-by: Philipp Tomsich

clk: rockchip: clk_rk3368: Implement "assign-clock-parent"

2018-01-28T16:12:39+00:00

Implement the setting parent for gmac clock, and add internal
pll div set for mac clk.

Signed-off-by: David Wu 
Acked-by: Philipp Tomsich 
Reviewed-by: Philipp Tomsich

clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and "assign-clock-rate"

2018-01-28T16:12:39+00:00

The RK3288 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3288 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
implement the gmac clock set parent, but simply ignore the
others' set_rate() operation and return 0 to signal success.

Signed-off-by: David Wu 
Acked-by: Philipp Tomsich 
Reviewed-by: Philipp Tomsich