u-boot.git/drivers/clk, branch v2020.10-rc2

Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

2020-08-04T15:07:38Z

- add DM based reset driver for SiFive SoC's.

Merge tag 'mips-pull-2020-08-03' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips

2020-08-04T15:07:16Z

- doc: fix qemu-mips build instructions - MIPS: add GPIO, CLK and SPI drivers for Octeon MIPS64

clk: Drop dm.h header file in clk-provider.h

2020-08-04T02:19:54Z

This header file should not be included in other header files. Remove it and use a forward declaration and un-inlining of dev_get_clk_ptr() instead. Fix up the kendryte header files to avoid build errors. Signed-off-by: Simon Glass Reviewed-by: Sean Anderson

sifive: reset: add DM based reset driver for SiFive SoC's

2020-08-04T01:19:41Z

PRCI module within SiFive SoC's has register with which we can reset the sub-systems within the SoC. The resets to DDR and ethernet sub systems within FU540-C000 SoC are active low, and are hold low by default on power-up. Currently these are directly asserted within prci driver via register read/write. With the DM based reset driver support here, we bind the reset driver with clock (prci) driver and assert the reset signals of both sub-system's appropriately. Signed-off-by: Sagar Shrikant Kadam Reviewed-by: Pragnesh Patel Reviewed-by: Bin Meng Tested-by: Bin Meng

fu540: prci: use common reset indexes defined in binding header

2020-08-04T01:19:41Z

Indexes of reset signals available in PRCI driver are also defined in include/dt-bindings/reset/sifive-fu540-prci.h. So use those instead of defining new ones again within the fu540-prci driver. Signed-off-by: Sagar Shrikant Kadam Reviewed-by: Pragnesh Patel Reviewed-by: Bin Meng

clk: clk_octeon: Add simple MIPS Octeon clock driver

2020-08-03T19:11:41Z

This patch adds a simple clock driver for the Marvell Octeon MIPS SoC family. Its for IO clock rate passing via DT in some of the Octeon driver, like I2C. So that we don't need to use the non-mainline API octeon_get_io_clock(). Signed-off-by: Stefan Roese Cc: Lukasz Majewski

Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

2020-07-27T15:15:37Z

binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements

treewide: convert devfdt_get_addr() to dev_read_addr()

2020-07-25T20:46:57Z

When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) Signed-off-by: Masahiro Yamada

treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()

2020-07-25T20:46:57Z

Use the _ptr suffixed variant instead of casting. Also, convert it to dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE. One curious part is an error check like follows in drivers/watchdog/omap_wdt.c: priv->regs = (struct wd_timer *)devfdt_get_addr(dev); if (!priv->regs) return -EINVAL; devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error. So, this code does not catch any error in DT parsing. dev_read_addr_ptr() returns NULL on error, so this error check will work. I generated this commit by the following command: $ find . -name .git -prune -o -name '*.[ch]' -type f -print | \ xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/' I manually fixed drivers/usb/host/ehci-mx6.c Signed-off-by: Masahiro Yamada

clk: renesas: Add R8A774A1 clock tables

2020-07-25T09:16:39Z

This sync's the clock tables with the official release from Linux 5.8-RC2 and update r8a774a1_mstp_table from Ref Manual v1.00. Signed-off-by: Adam Ford